异步FIFO（寄存器存储）_基于寄存器的异步fifo

module async_fifo(
 rst_n,
 fifo_wr_clk,
 fifo_wr_en,
 fifo_full,
 fifo_wr_data,
 
 fifo_rd_clk,
 fifo_rd_en,
 fifo_rd_data,
 fifo_empty);
 
 input rst_n;
 input fifo_wr_en;
 input fifo_rd_en;
 input fifo_rd_clk;
 input fifo_wr_clk; 
 input [7:0] fifo_wr_data;
 output fifo_empty;
 output fifo_full;
 output reg [7:0] fifo_rd_data;
 
 reg [4:0] rdaddress;
 reg [4:0] wraddress;
 reg [15:0][7:0] memory ;
 
 wire [4:0] gray_rdaddress;
 wire [4:0] gray_wraddress;
 
 reg [4:0] sync_w2r_r1,sync_w2r_r2;
 reg [4:0] sync_r2w_r1,sync_r2w_r2;
 
 assign gray_rdaddress={1'b0,rdaddress[4:1]}^rdaddress;
 assign gray_wraddress={1'b0,wraddress[4:1]}^wraddress;
 
 assign fifo_empty = (gray_rdaddress==sync_w2r_r2);
 assign fifo_full = (gray_wraddress=={~sync_r2w_r2[4:3],sync_r2w_r2[2:0]});
 
always @(posedge fifo_rd_clk or negedge rst_n)begin
	if(!rst_n)begin
		rdaddress<=5'd0;
	//	memory[rdaddress[3:0]]<=8'bx;
		fifo_rd_data<&