这个屌丝很懒，什么也没留下！

[HDLBits] Sim/circuit9

作者：不正经 | 2024-05-03 10:00:43

This is a sequential circuit. Read the simulation waveforms to determine what the circuit does, then implement it.

2030405060708090100110120130140150160170180190200210clkaq4560123456014560


module top_module (
    input clk,
    input a,
    output [3:0] q );
    always@(posedge clk)begin
        if(a)
            q <= 'd4;
        else if(q == 6)
            q <= 4'b0;
        else
            q <= q + 1;   
    end
endmodule

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