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ZYNQ使用AXI DMA(Scatter/Gather)模式进行PL与PS数据交互附源码（ps端移植freertos或者裸机）_axi dma pl向ps端传输数据

作者：人工智能uu | 2024-07-15 17:59:10

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axi dma pl向ps端传输数据

简介

AXI DMA操作需要先提供一个在内存中驻留的不变空间，用于存储需要进行的DMA操作。形容这“每一次操作”的东西叫做Buffer Descriptor，缩写叫BD，这些BD是连接成链表的形式的，因为BD会动态增加，而预先分配存储BD的空间是恒定的，因此BD被连成一个环（BD Ring）,其实就是一个循环链表。

Scatter/Gather 允许一个数据包（Packet）由多个描述符（BD）来描述。官方文档指出的一个典型应用是在传输网络包时，Header和数据往往是分开存储的，利用SG模式可以较好的处理向多个目标读写的操作，提高应用吞吐量。 DB Ring中DB成链存放，为了解决环形结构带来的不知道Packet的起点和终点带来的问题，DMA使用了帧开始位 (TXSOF，TX Start of Frame bit) 和帧结束位 (TXEOF，TX End of Frame Bit)来分辨一段Packet。 当 DMA 获取设置了 TXSOF 位的描述符时，将触发Packet的开始。 Packet继续获取后续描述符，直到它获取一个设置了 TXEOF 位的描述符。

在接收 (S2MM) 通道上，当开始接收数据包时，AXI DMA会自动使用 RXSOF 标记描述符，告诉软件部分这个描述符对应的buffer是一个数据包的开头。 如果正在接收的数据包的总字节数比描述符中指定的长，则用下一个描述符接着传。 这种获取和存储过程一直持续到整个接收数据包被传输完毕。 接收到数据包结尾时正在处理的描述符由AXI DMA自动标记为RXEOF=1。表明与该描述符关联的缓冲区包含数据包的结尾。

每个描述符内部指明了该特定描述符实际传输的字节数。 软件可以通过从 RXSOF 描述符通过描述符链到 RXEOF 描述符来确定为接收数据包传输的总字节数。

Scatter Gather 操作从设置控制寄存器和描述符指针开始。

设置和启动 MM2S 通道的 DMA 具体操作如下：

  • 将起始描述符的位置写入Current Descriptor寄存器中
  • 设置运行/停止位为1（MM2S_DMACR.RS=1）启动MM2S运行
  • (可选)启用中断（MM2S_DMACR.IOC_IrqEn 和 MM2S_DMACR.Err_IrqEn）
  • 将末尾描述符位置写入Tail Descriptor寄存器中，写入后会立刻触发DMA获取描述符，如果是多通道，这一步骤会在数据包到达S2MM时开始
  • 处理当前描述符，从内存中读取数据并转化成Stream输出

S2MM通道的配置类似：

  • 将起始描述符的位置写入Current Descriptor寄存器中
  • 通过将运行/停止位设置为 1 (S2MM_DMACR.RS =1) 来启动 S2MM 通道运行，并且暂停位 (DMASR.Halted) 置低，指示 S2MM 通道正在运行
  • (可选)启用中断（MM2S_DMACR.IOC_IrqEn 和 MM2S_DMACR.Err_IrqEn）
  • 将有效地址写入尾部描述符寄存器，自动触发 DMA 从内存获取描述符
  • 处理获取的描述符，并将从 S2MM 流式通道接收到的任何数据写入内存

不说了理论知识去看其他up分享我们直接上配置教程

AXI DMA 配置

 AXI FIFO配置

 

 ZYNQ配置

 

 

 配置完成我们进行AXI Stream流接口ip核的设计

上源码    （封装IP核的技能自己学一下）

  1. module pl_write(
  2. input               m_axis_aclk,
  3. input               m_axis_aresetn,
  4.  
  5. input      [63:0]   pl_data  ,
  6. input               data_en  ,
  7.  
  8. input               m_axis_tready,
  9. output reg [31:0]   m_axis_tdata,
  10. output     [3:0]    m_axis_tkeep,
  11. output              m_axis_tlast,v
  12. output reg          m_axis_tvalid
  13. ); 
  14.  
  15. parameter  DATA_0 = 4'b0000,
  16.            DATA_1 = 4'b0001,
  17.            DATA_2 = 4'b0011,
  18.            DATA_3 = 4'b0010,
  19.            DATA_4 = 4'b0110,
  20.            DATA_5 = 4'b0111,
  21.            DATA_6 = 4'b0101,
  22.            DATA_7 = 4'b0100,
  23.            DATA_8 = 4'b1100,
  24.            DATA_9 = 4'b1101;
  25.  
  26. reg       data_en_1;
  27. reg [63:0]pl_data_1;
  28. reg [3:0] next_flag;
  29.  
  30. assign  m_axis_tkeep  = 4'b1111;  
  31. assign  m_axis_tlast  = (next_flag==DATA_9)&&m_axis_tready&&m_axis_tvalid;
  32.  
  33. always @(posedge m_axis_aclk) begin
  34.     if(m_axis_aresetn == 1'b0)begin
  35.         data_en_1<=1'b0;
  36.         pl_data_1<=64'd0;
  37.     end
  38.     else if(m_axis_tready) begin
  39.         data_en_1<=data_en;
  40.         pl_data_1<=pl_data;
  41.     end 
  42. end
  43.  
  44. always@(posedge m_axis_aclk)begin
  45.     if(m_axis_aresetn == 1'b0)begin
  46.         next_flag<=DATA_0;
  47.         m_axis_tdata <= 32'd0;
  48.         m_axis_tvalid<=1'b0;
  49.     end
  50.     else if(data_en_1) begin
  51.             m_axis_tvalid<=1'b1;
  52.             case (next_flag)
  53.             DATA_0  : begin
  54.                 if(m_axis_tready)begin
  55.                     next_flag<=DATA_1;
  56.                     m_axis_tdata<={32'h22111111};
  57.                 end else begin
  58.                     m_axis_tdata <= m_axis_tdata;
  59.                     next_flag<=DATA_0;
  60.                 end
  61.             end
  62.             DATA_1 :begin
  63.                 if(m_axis_tready)begin
  64.                     m_axis_tdata<={32'h22111111};
  65.                     next_flag<=DATA_2;
  66.                 end else begin
  67.                     m_axis_tdata <= m_axis_tdata;
  68.                     next_flag<=DATA_1;
  69.                 end
  70.             end
  71.             DATA_2 :begin
  72.                 if(m_axis_tready)begin
  73.                     m_axis_tdata<={32'h22111111};
  74.                     next_flag<=DATA_3;
  75.                 end else begin
  76.                     m_axis_tdata <= m_axis_tdata;
  77.                     next_flag<=DATA_2;
  78.                 end
  79.             end
  80.             DATA_3 :begin
  81.                 if(m_axis_tready)begin
  82.                     m_axis_tdata<={32'h22111111};
  83.                     next_flag<=DATA_4;
  84.                 end else begin
  85.                     m_axis_tdata <= m_axis_tdata;
  86.                     next_flag<=DATA_3;
  87.                 end
  88.             end
  89.             DATA_4  : begin
  90.                 if(m_axis_tready)begin
  91.                     m_axis_tdata<={8'd01,8'd12,pl_data_1[15:0]};
  92.                     next_flag<=DATA_5;
  93.                 end else begin
  94.                     m_axis_tdata <= m_axis_tdata;
  95.                     next_flag<=DATA_4;
  96.                 end
  97.             end
  98.             DATA_5 :begin
  99.                 if(m_axis_tready)begin
  100.                     m_axis_tdata<={8'd02,8'd12,pl_data_1[31:16]};
  101.                     next_flag<=DATA_6;
  102.                 end else begin
  103.                     m_axis_tdata <= m_axis_tdata;
  104.                     next_flag<=DATA_5;
  105.                 end
  106.             end
  107.             DATA_6 :begin
  108.                 if(m_axis_tready)begin
  109.                     m_axis_tdata<={8'd03,8'd12,pl_data_1[47:32]};
  110.                     next_flag<=DATA_7;
  111.                 end else begin
  112.                     m_axis_tdata <= m_axis_tdata;
  113.                     next_flag<=DATA_6;
  114.                 end
  115.             end
  116.             DATA_7 :begin
  117.                 if(m_axis_tready)begin
  118.                     m_axis_tdata<={8'd04,8'd12,8'd0,pl_data_1[55:48]};
  119.                     next_flag<=DATA_8;
  120.                 end else begin
  121.                     m_axis_tdata <= m_axis_tdata;
  122.                     next_flag<=DATA_7;
  123.                 end
  124.             end
  125.             DATA_8 :begin
  126.                 if(m_axis_tready)begin
  127.                     m_axis_tdata<={8'd05,8'd12,8'd0,pl_data_1[63:56]};
  128.                     next_flag<=DATA_9;
  129.                 end else begin
  130.                     m_axis_tdata <= m_axis_tdata;
  131.                     next_flag<=DATA_8;
  132.                 end
  133.             end
  134.             DATA_9 :begin
  135.                 if(m_axis_tready)begin
  136.                     m_axis_tdata<={32'hffffffff};
  137.                     next_flag<=DATA_0;
  138.                 end else begin
  139.                     m_axis_tdata <= m_axis_tdata;
  140.                     next_flag<=DATA_9;
  141.                 end
  142.             end
  143.             default:begin
  144.                     next_flag<=DATA_0;
  145.                     m_axis_tdata <= m_axis_tdata;
  146.                 end 
  147.             endcase
  148.     end
  149.     else begin
  150.         m_axis_tvalid<=1'b0;
  151.     end
  152. end
  153.  
  154. endmodule

 数据发送IP核根据自己需求创建了

上ps端代码

注意：每一个bd可存储4字节的数据 bd串联为一个环形成一个数据包packet

// 要传输的每个packet大小
#define MAX_PKT_LEN        0x4   //缓冲个数 字节
#define MARK_UNCACHEABLE        0x701
// 每个packet对应的BD数量
#define NUMBER_OF_BDS_PER_PKT        11//一个bd 4字节
// 一共要传输的packet个数
#define NUMBER_OF_PKTS_TO_TRANSFER     1

此代码为接收代码

  1. #include "xaxidma.h"
  2. #include "xparameters.h"
  3. #include "xil_exception.h"
  4. #include "xdebug.h"
  5. #include "xscugic.h"
  6. #include "xaxidma_hw.h"
  7.  
  8. #define DMA_DEV_ID		XPAR_AXIDMA_0_DEVICE_ID
  9.  
  10. #define MEM_BASE_ADDR		0x01100000         //ddr地址
  11. #define RX_INTR_ID			XPAR_FABRIC_AXIDMA_0_S2MM_INTROUT_VEC_ID
  12. #define RX_BD_SPACE_BASE	(MEM_BASE_ADDR)
  13. #define RX_BD_SPACE_HIGH	(MEM_BASE_ADDR + 0x0000FFFF)
  14. #define RX_BUFFER_BASE		(MEM_BASE_ADDR + 0x00300000)
  15. #define RX_BUFFER_HIGH		(MEM_BASE_ADDR + 0x00300FFF)
  16. #define INTC_DEVICE_ID      XPAR_SCUGIC_SINGLE_DEVICE_ID
  17.  
  18. //超时计数
  19. #define RESET_TIMEOUT_COUNTER	10000
  20. // 要传输的每个packet大小
  21. #define MAX_PKT_LEN		0x4   //缓冲个数 字节
  22. #define MARK_UNCACHEABLE        0x701
  23. // 每个packet对应的BD数量
  24. #define NUMBER_OF_BDS_PER_PKT		11//一个bd 4字节
  25. // 一共要传输的packet个数
  26. #define NUMBER_OF_PKTS_TO_TRANSFER 	1
  27. // 总共需要的BD总数
  28. #define NUMBER_OF_BDS_TO_TRANSFER	(NUMBER_OF_PKTS_TO_TRANSFER * \
  29. 						NUMBER_OF_BDS_PER_PKT)
  30.  
  31. //中断合并阈值和延迟定时器阈值我们将合并阈值设置为包的总数。在这个例子中，接收端只会得到一个完成中断。
  32. #define COALESCING_COUNT		NUMBER_OF_PKTS_TO_TRANSFER
  33. #define DELAY_TIMER_COUNT		100
  34.  
  35. #define INTC		XScuGic
  36. #define INTC_HANDLER	XScuGic_InterruptHandler
  37. //函数申明
  38.  
  39.  int CheckData(int Length);
  40.  void RxCallBack(XAxiDma_BdRing * RxRingPtr);
  41.  void RxIntrHandler(void *Callback);
  42.  int SetupIntrSystem(INTC * IntcInstancePtr,XAxiDma * AxiDmaPtr, u16 RxIntrId);
  43.  void DisableIntrSystem(INTC * IntcInstancePtr, u16 RxIntrId);
  44.  int RxSetup(XAxiDma * AxiDmaInstPtr);
  45. //设备实例
  46. XAxiDma AxiDma;
  47. //中断控制器实例
  48. static INTC Intc;
  49. //中断标志
  50. volatile int RxDone=0;
  51. volatile int Error=0;
  52.  
  53. int main(void)
  54. {
  55. 	int Status;
  56. 	XAxiDma_Config *Config;
  57. 	xil_printf("\r\n--- Entering strart --- \r\n");
  58. 	//查找设备配置信息
  59. 	Config = XAxiDma_LookupConfig(DMA_DEV_ID);
  60. 	if (!Config) {
  61. 		xil_printf("No config found for %d\r\n", DMA_DEV_ID);
  62. 		return XST_FAILURE;
  63. 	}
  64. 	//初始化DMA引擎
  65. 	XAxiDma_CfgInitialize(&AxiDma, Config);
  66. 	if(!XAxiDma_HasSg(&AxiDma)) {
  67. 		xil_printf("Device configured as Simple mode \r\n");
  68. 		return XST_FAILURE;
  69. 	}
  70. 	//设置接收通道，以使数据准备好接收
  71. 	Status = RxSetup(&AxiDma);
  72. 	if (Status != XST_SUCCESS) {
  73. 		xil_printf("Failed RX setup\r\n");
  74. 		return XST_FAILURE;
  75. 	}
  76. 	//设置中断
  77. 	Status = SetupIntrSystem(&Intc, &AxiDma, RX_INTR_ID);
  78. 	if (Status != XST_SUCCESS) {
  79. 		xil_printf("Failed intr setup\r\n");
  80. 		return XST_FAILURE;
  81. 	}
  82. 	return XST_SUCCESS;
  83. }
  84.  
  85. //数据比对
  86.  int CheckData(int Length)
  87. {
  88. 	u8 *RxPacket;
  89. 	int Index = 0;
  90. 	Xil_DCacheFlushRange((UINTPTR)RX_BUFFER_BASE, MAX_PKT_LEN *NUMBER_OF_BDS_TO_TRANSFER);
  91. 	RxPacket = (u8 *) RX_BUFFER_BASE;
  92. 	//使指定地址缓存区失效
  93. 	Xil_DCacheInvalidateRange((UINTPTR)RxPacket, Length);
  94. 	for(Index = 0; Index < Length; Index+=4) {
  95. 			xil_printf("Data %d: %x %x %x %x\r\n", Index / 4, RxPacket[Index + 3], RxPacket[Index + 2], RxPacket[Index + 1], RxPacket[Index + 0]);
  96. 	}
  97. 	RxDone=0;
  98. 	RxSetup(&AxiDma);
  99. 	XAxiDma_IntrAckIrq(&AxiDma,XAXIDMA_IRQ_IOC_MASK,XAXIDMA_DEVICE_TO_DMA);
  100. 	return XST_SUCCESS;
  101. }
  102.  
  103.  void RxCallBack(XAxiDma_BdRing * RxRingPtr)
  104. {
  105. 	int BdCount;
  106. 	XAxiDma_Bd *BdPtr;
  107. 	XAxiDma_Bd *BdCurPtr;
  108. 	u32 BdSts;
  109. 	int Index;
  110. 	xil_printf("enter RxCallBack\r\n");
  111. 	//获取所有已处理bd
  112. 	BdCount = XAxiDma_BdRingFromHw(RxRingPtr, XAXIDMA_ALL_BDS, &BdPtr);
  113. 	//处理bd
  114. 	BdCurPtr = BdPtr;
  115. 	for (Index = 0; Index < BdCount; Index++) {
  116. 		//检查bd状态并判断是否有错误
  117. 		BdSts = XAxiDma_BdGetSts(BdCurPtr);
  118. 		if ((BdSts & XAXIDMA_BD_STS_ALL_ERR_MASK) ||
  119. 		    (!(BdSts & XAXIDMA_BD_STS_COMPLETE_MASK))) {
  120. 			Error = 1;
  121. 			break;
  122. 		}
  123. 		//查找下一个处理的bd
  124. 		BdCurPtr = (XAxiDma_Bd *)XAxiDma_BdRingNext(RxRingPtr, BdCurPtr);
  125. 		RxDone += 1;
  126. 	}
  127. 	CheckData(RxDone);
  128. }
  129.  
  130.  void RxIntrHandler(void *Callback)
  131. {
  132. 	XAxiDma_BdRing *RxRingPtr = (XAxiDma_BdRing *) Callback;
  133. 	u32 IrqStatus;
  134. 	int TimeOut;
  135. 	/* Read pending interrupts */
  136. 	IrqStatus = XAxiDma_BdRingGetIrq(RxRingPtr);
  137. 	/* Acknowledge pending interrupts */
  138. 	XAxiDma_BdRingAckIrq(RxRingPtr, IrqStatus);
  139. 	if (!(IrqStatus & XAXIDMA_IRQ_ALL_MASK)) {return;}
  140. 	if ((IrqStatus & XAXIDMA_IRQ_ERROR_MASK)) {
  141. 		XAxiDma_BdRingDumpRegs(RxRingPtr);
  142. 		Error = 1;
  143. 		XAxiDma_Reset(&AxiDma);
  144. 		TimeOut = RESET_TIMEOUT_COUNTER;
  145. 		while (TimeOut) {
  146. 			if(XAxiDma_ResetIsDone(&AxiDma)) {break;}
  147. 			TimeOut -= 1;
  148. 		}
  149. 		return;
  150. 	}
  151. 	//调用回调
  152. 	if ((IrqStatus & (XAXIDMA_IRQ_DELAY_MASK | XAXIDMA_IRQ_IOC_MASK))) {
  153. 		xil_printf("Generate rx interrupt\r\n");
  154. 		RxCallBack(RxRingPtr);
  155. 	}
  156. }
  157. //初始化中断
  158.  int SetupIntrSystem(INTC * IntcInstancePtr,XAxiDma * AxiDmaPtr, u16 RxIntrId)
  159. {
  160. 	//获取发送/接收 环
  161. 	XAxiDma_BdRing *RxRingPtr = XAxiDma_GetRxRing(AxiDmaPtr);
  162. 	int Status;
  163. 	XScuGic_Config *IntcConfig;
  164. 	//查找中断控制器信息
  165. 	IntcConfig = XScuGic_LookupConfig(INTC_DEVICE_ID);
  166. 	if (NULL == IntcConfig) {
  167. 		return XST_FAILURE;
  168. 	}
  169. 	//初始化中断控制器
  170. 	Status = XScuGic_CfgInitialize(IntcInstancePtr, IntcConfig,
  171. 					IntcConfig->CpuBaseAddress);
  172. 	if (Status != XST_SUCCESS) {
  173. 		return XST_FAILURE;
  174. 	}
  175. 	//设置中断优先级
  176. 	XScuGic_SetPriorityTriggerType(IntcInstancePtr, RxIntrId, 0xA0, 0x3);
  177. 	//绑定中断处理函数
  178. 	Status = XScuGic_Connect(IntcInstancePtr, RxIntrId,
  179. 				(Xil_InterruptHandler)RxIntrHandler,
  180. 				RxRingPtr);
  181. 	if (Status != XST_SUCCESS) {
  182. 		return Status;
  183. 	}
  184. 	//启动中断源
  185. 	XScuGic_Enable(IntcInstancePtr, RxIntrId);
  186. 	//启动硬件中断
  187. 	Xil_ExceptionInit();
  188. 	//绑定中断异常处理函数
  189. 	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
  190. 			(Xil_ExceptionHandler)INTC_HANDLER,
  191. 			(void *)IntcInstancePtr);
  192. 	//启用IRQ异常
  193. 	Xil_ExceptionEnable();
  194. 	return XST_SUCCESS;
  195. }
  196. //禁用dma中断
  197.  void DisableIntrSystem(INTC * IntcInstancePtr, u16 RxIntrId)
  198. {
  199. 	XScuGic_Disconnect(IntcInstancePtr, RxIntrId);
  200. }
  201. //设置读取通道
  202.  int RxSetup(XAxiDma * AxiDmaInstPtr)
  203. {
  204. 	XAxiDma_BdRing *RxRingPtr;
  205. 	int Status;
  206. 	XAxiDma_Bd BdTemplate;
  207. 	XAxiDma_Bd *BdPtr;
  208. 	XAxiDma_Bd *BdCurPtr;
  209. 	int BdCount;
  210. 	int FreeBdCount;
  211. 	UINTPTR RxBufferPtr;
  212. 	int Index;
  213. 	//获取接收环
  214. 	RxRingPtr = XAxiDma_GetRxRing(&AxiDma);
  215. 	//设置空间之前禁用所有读取中断
  216. 	XAxiDma_BdRingIntDisable(RxRingPtr, XAXIDMA_IRQ_ALL_MASK);
  217. 	//设置bd空间
  218. 	BdCount = XAxiDma_BdRingCntCalc(XAXIDMA_BD_MINIMUM_ALIGNMENT,
  219. 				RX_BD_SPACE_HIGH - RX_BD_SPACE_BASE + 1);
  220. 	//创建bd环
  221. 	Status = XAxiDma_BdRingCreate(RxRingPtr, RX_BD_SPACE_BASE,RX_BD_SPACE_BASE,
  222. 					XAXIDMA_BD_MINIMUM_ALIGNMENT, BdCount);
  223. 	if (Status != XST_SUCCESS) {
  224. 		xil_printf("Rx bd create failed with %d\r\n", Status);
  225. 		return XST_FAILURE;
  226. 	}
  227. 	//为Rx通道设置BD模板。然后复制到每个RX BD。
  228. 	//bd归零
  229. 	XAxiDma_BdClear(&BdTemplate);
  230. 	//复制模板到创建的bd  模板为16个4字节数据uint32_t类型
  231. 	Status = XAxiDma_BdRingClone(RxRingPtr, &BdTemplate);
  232. 	if (Status != XST_SUCCESS) {
  233. 		xil_printf("Rx bd clone failed with %d\r\n", Status);
  234. 		return XST_FAILURE;
  235. 	}
  236. 	//在读取bd环上加上缓冲区以便读取数据
  237. 	FreeBdCount = XAxiDma_BdRingGetFreeCnt(RxRingPtr);
  238. 	Status = XAxiDma_BdRingAlloc(RxRingPtr, FreeBdCount, &BdPtr);
  239. 	if (Status != XST_SUCCESS) {
  240. 		xil_printf("Rx bd alloc failed with %d\r\n", Status);
  241. 		return XST_FAILURE;
  242. 	}
  243. 	BdCurPtr = BdPtr;
  244. 	RxBufferPtr = RX_BUFFER_BASE;
  245. 	for (Index = 0; Index < FreeBdCount; Index++) {
  246. 		//设置bd缓冲地址
  247. 		Status = XAxiDma_BdSetBufAddr(BdCurPtr, RxBufferPtr);
  248. 		if (Status != XST_SUCCESS) {
  249. 			xil_printf("Rx set buffer addr %x on BD %x failed %d\r\n",
  250. 			(unsigned int)RxBufferPtr,
  251. 			(UINTPTR)BdCurPtr, Status);
  252. 			return XST_FAILURE;
  253. 		}
  254. 		//为给定的bd设置子段长度
  255. 		Status = XAxiDma_BdSetLength(BdCurPtr, MAX_PKT_LEN,
  256. 					RxRingPtr->MaxTransferLen);
  257. 		if (Status != XST_SUCCESS) {
  258. 			xil_printf("Rx set length %d on BD %x failed %d\r\n",
  259. 			    MAX_PKT_LEN, (UINTPTR)BdCurPtr, Status);
  260. 			return XST_FAILURE;
  261. 		}
  262. 		//接收BDs不需要设置任何控件硬件会设置每个流的SOF/EOF位
  263. 		//设置bd控制位
  264. 		XAxiDma_BdSetCtrl(BdCurPtr, 0);
  265. 		//设置bd的id
  266. 		XAxiDma_BdSetId(BdCurPtr, RxBufferPtr);
  267. 		RxBufferPtr += MAX_PKT_LEN;
  268. 		BdCurPtr = (XAxiDma_Bd *)XAxiDma_BdRingNext(RxRingPtr, BdCurPtr);
  269. 	}
  270. 	//设置合并阈值，因此只有一个接收中断在本例中出现如果你想有多个中断发生，改变 COALESCING_COUNT是一个较小的值
  271. 	//为给定的描述符环形通道设置中断合并参数。
  272. 	Status = XAxiDma_BdRingSetCoalesce(RxRingPtr, COALESCING_COUNT,DELAY_TIMER_COUNT);
  273. 	if (Status != XST_SUCCESS) {
  274. 		xil_printf("Rx set coalesce failed with %d\r\n", Status);
  275. 		return XST_FAILURE;
  276. 	}
  277. 	//将一组bd加入到分配的硬件中
  278. 	Status = XAxiDma_BdRingToHw(RxRingPtr, FreeBdCount, BdPtr);
  279. 	if (Status != XST_SUCCESS) {
  280. 		xil_printf("Rx ToHw failed with %d\r\n", Status);
  281. 		return XST_FAILURE;
  282. 	}
  283. 	//使能所有读取中断
  284. 	XAxiDma_BdRingIntEnable(RxRingPtr, XAXIDMA_IRQ_ALL_MASK);
  285. 	//启动读取dma通道
  286. 	Status = XAxiDma_BdRingStart(RxRingPtr);
  287. 	if (Status != XST_SUCCESS) {
  288. 		xil_printf("Rx start BD ring failed with %d\r\n", Status);
  289. 		return XST_FAILURE;
  290. 	}
  291. 	return XST_SUCCESS;
  292. }

此代码为回环 DMA需要勾选发送和接收端口并直接将zynq接收和发送端连接起来形成回环就可以了

  1. #include "xaxidma.h"
  2. #include "xparameters.h"
  3. #include "xil_exception.h"
  4. #include "xdebug.h"
  5. #include "xscugic.h"
  6.  
  7. #define DMA_DEV_ID		XPAR_AXIDMA_0_DEVICE_ID
  8.  
  9. #define MEM_BASE_ADDR		0x01100000         //ddr地址
  10. #define RX_INTR_ID		XPAR_FABRIC_AXIDMA_0_S2MM_INTROUT_VEC_ID
  11. #define TX_INTR_ID		XPAR_FABRIC_AXIDMA_0_MM2S_INTROUT_VEC_ID
  12. #define RX_BD_SPACE_BASE	(MEM_BASE_ADDR)
  13. #define RX_BD_SPACE_HIGH	(MEM_BASE_ADDR + 0x0000FFFF)
  14. #define TX_BD_SPACE_BASE	(MEM_BASE_ADDR + 0x00010000)
  15. #define TX_BD_SPACE_HIGH	(MEM_BASE_ADDR + 0x0001FFFF)
  16. #define TX_BUFFER_BASE		(MEM_BASE_ADDR + 0x00100000)
  17. #define RX_BUFFER_BASE		(MEM_BASE_ADDR + 0x00300000)
  18. #define RX_BUFFER_HIGH		(MEM_BASE_ADDR + 0x004FFFFF)
  19. #define INTC_DEVICE_ID          XPAR_SCUGIC_SINGLE_DEVICE_ID
  20.  
  21. //超时计数
  22. #define RESET_TIMEOUT_COUNTER	10000
  23. // 要传输的每个packet大小
  24. #define MAX_PKT_LEN		0x100    //缓冲个数
  25. #define MARK_UNCACHEABLE        0x701
  26. // 每个packet对应的BD数量
  27. #define NUMBER_OF_BDS_PER_PKT		12
  28. // 一共要传输的packet个数
  29. #define NUMBER_OF_PKTS_TO_TRANSFER 	11
  30. // 总共需要的BD总数
  31. #define NUMBER_OF_BDS_TO_TRANSFER	(NUMBER_OF_PKTS_TO_TRANSFER * \
  32. 						NUMBER_OF_BDS_PER_PKT)
  33.  
  34. /*中断合并阈值和延迟定时器阈值
  35. *有效范围为1到255
  36. *我们将合并阈值设置为包的总数。在这个例子中，接收端只会得到一个完成中断。
  37. */
  38. #define COALESCING_COUNT		NUMBER_OF_PKTS_TO_TRANSFER
  39. #define DELAY_TIMER_COUNT		100
  40.  
  41. #define INTC		XScuGic
  42. #define INTC_HANDLER	XScuGic_InterruptHandler
  43. //函数申明
  44. static int CheckData(int Length, u8 StartValue);
  45. static void TxCallBack(XAxiDma_BdRing * TxRingPtr);
  46. static void TxIntrHandler(void *Callback);
  47. static void RxCallBack(XAxiDma_BdRing * RxRingPtr);
  48. static void RxIntrHandler(void *Callback);
  49. static int SetupIntrSystem(INTC * IntcInstancePtr,
  50. 			   XAxiDma * AxiDmaPtr, u16 TxIntrId, u16 RxIntrId);
  51. static void DisableIntrSystem(INTC * IntcInstancePtr,
  52. 					u16 TxIntrId, u16 RxIntrId);
  53. static int RxSetup(XAxiDma * AxiDmaInstPtr);
  54. static int TxSetup(XAxiDma * AxiDmaInstPtr);
  55. static int SendPacket(XAxiDma * AxiDmaInstPtr);
  56.  
  57. //设备实例
  58. XAxiDma AxiDma;
  59. //中断控制器实例
  60. static INTC Intc;
  61. //中断标志
  62. volatile int TxDone;
  63. volatile int RxDone;
  64. volatile int Error;
  65.  
  66. //发送数据包缓冲区，必须32位对齐使用
  67. u32 *Packet = (u32 *) TX_BUFFER_BASE;
  68.  
  69. int main(void)
  70. {
  71. 	int Status;
  72. 	XAxiDma_Config *Config;
  73. 	xil_printf("\r\n--- Entering strart --- \r\n");
  74. 	//查找设备配置信息
  75. 	Config = XAxiDma_LookupConfig(DMA_DEV_ID);
  76. 	if (!Config) {
  77. 		xil_printf("No config found for %d\r\n", DMA_DEV_ID);
  78. 		return XST_FAILURE;
  79. 	}
  80. 	//初始化DMA引擎
  81. 	XAxiDma_CfgInitialize(&AxiDma, Config);
  82. 	if(!XAxiDma_HasSg(&AxiDma)) {
  83. 		xil_printf("Device configured as Simple mode \r\n");
  84. 		return XST_FAILURE;
  85. 	}
  86. 	//设置发送通道，以使数据准备好发送
  87. 	Status = TxSetup(&AxiDma);
  88. 	if (Status != XST_SUCCESS) {
  89. 		xil_printf("Failed TX setup\r\n");
  90. 		return XST_FAILURE;
  91. 	}
  92. 	//设置接收通道，以使数据准备好接收
  93. 	Status = RxSetup(&AxiDma);
  94. 	if (Status != XST_SUCCESS) {
  95. 		xil_printf("Failed RX setup\r\n");
  96. 		return XST_FAILURE;
  97. 	}
  98. 	//设置中断
  99. 	Status = SetupIntrSystem(&Intc, &AxiDma, TX_INTR_ID, RX_INTR_ID);
  100. 	if (Status != XST_SUCCESS) {
  101. 		xil_printf("Failed intr setup\r\n");
  102. 		return XST_FAILURE;
  103. 	}
  104. 	//初始化标志信号
  105. 	TxDone = 0;
  106. 	RxDone = 0;
  107. 	Error = 0;
  108. 	//发送数据
  109. 	Status = SendPacket(&AxiDma);
  110. 	if (Status != XST_SUCCESS) {
  111. 		xil_printf("Failed send packet\r\n");
  112. 		return XST_FAILURE;
  113. 	}
  114. 	//检查发送接收是否完成
  115. 	while (((TxDone < NUMBER_OF_BDS_TO_TRANSFER) ||
  116. 			(RxDone < NUMBER_OF_BDS_TO_TRANSFER)) && !Error) {}
  117. 	if (Error) {
  118. 		xil_printf("Failed test transmit%s done, "
  119. 			"receive%s done\r\n", TxDone? "":" not",
  120. 					RxDone? "":" not");
  121. 		goto Done;
  122. 	}else {
  123. 		//数据比对
  124. 		Status = CheckData(MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER,0xC);
  125. 		if (Status != XST_SUCCESS) {
  126. 			xil_printf("Data check failed\r\n");
  127. 			goto Done;
  128. 		}
  129. 		xil_printf("Successfully ran AXI DMA SG interrupt Example\r\n");
  130. 	}
  131. 	//关闭发送、接收中断
  132. 	DisableIntrSystem(&Intc, TX_INTR_ID, RX_INTR_ID);
  133. Done:
  134. 	xil_printf("--- Exiting end --- \r\n");
  135. 	if (Status != XST_SUCCESS) {
  136. 		return XST_FAILURE;
  137. 	}
  138. 	return XST_SUCCESS;
  139. }
  140. //数据比对
  141. static int CheckData(int Length, u8 StartValue)
  142. {
  143. 	u8 *RxPacket;
  144. 	int Index = 0;
  145. 	u8 Value;
  146.  
  147. 	RxPacket = (u8 *) RX_BUFFER_BASE;
  148. 	Value = StartValue;
  149. 	//使指定地址缓存区失效
  150. 	Xil_DCacheInvalidateRange((UINTPTR)RxPacket, Length);
  151.  
  152. 	for(Index = 0; Index < Length; Index++) {
  153. 		if (RxPacket[Index] != Value) {
  154. 			xil_printf("Data error %d: %x/%x\r\n",
  155. 			    Index, RxPacket[Index], Value);
  156. 			return XST_FAILURE;
  157. 		}
  158. 		Value = (Value + 1) & 0xFF;
  159. 	}
  160. 	return XST_SUCCESS;
  161. }
  162. //发送回调函数
  163. static void TxCallBack(XAxiDma_BdRing * TxRingPtr)
  164. {
  165. 	int BdCount;
  166. 	u32 BdSts;
  167. 	XAxiDma_Bd *BdPtr;
  168. 	XAxiDma_Bd *BdCurPtr;
  169. 	int Status;
  170. 	int Index;
  171. 	xil_printf("enter TxCallBack\r\n");
  172. 	//获取所有已处理bd
  173. 	BdCount = XAxiDma_BdRingFromHw(TxRingPtr, XAXIDMA_ALL_BDS, &BdPtr);
  174. 	//处理bd
  175. 	BdCurPtr = BdPtr;
  176. 	for (Index = 0; Index < BdCount; Index++) {
  177. 		//检查bd状态并判断是否有错误
  178. 		BdSts = XAxiDma_BdGetSts(BdCurPtr);
  179. 		if ((BdSts & XAXIDMA_BD_STS_ALL_ERR_MASK) ||
  180. 		    (!(BdSts & XAXIDMA_BD_STS_COMPLETE_MASK))) {
  181. 			Error = 1;
  182. 			break;
  183. 		}
  184. 		//这里我们什么都不需要做。但是如果RTOS是使用时，我们可能需要释放附加的数据包缓冲区处理过的BD
  185. 		/*   NOP  */
  186. 		//查找下一个处理的bd
  187. 		BdCurPtr = (XAxiDma_Bd *)XAxiDma_BdRingNext(TxRingPtr, BdCurPtr);
  188. 	}
  189. 	//释放所有bd内存以便下一次使用
  190. 	Status = XAxiDma_BdRingFree(TxRingPtr, BdCount, BdPtr);
  191. 	if (Status != XST_SUCCESS) {
  192. 		Error = 1;
  193. 	}
  194. 	if(!Error) {
  195. 		//没有错误返回已处理bd个数
  196. 		TxDone += BdCount;
  197. 	}
  198. }
  199. //发送中断函数
  200. static void TxIntrHandler(void *Callback)
  201. {
  202. 	XAxiDma_BdRing *TxRingPtr = (XAxiDma_BdRing *) Callback;
  203. 	u32 IrqStatus;
  204. 	int TimeOut;
  205. 	//读取挂起中断
  206. 	IrqStatus = XAxiDma_BdRingGetIrq(TxRingPtr);
  207. 	//确认挂起中断
  208. 	XAxiDma_BdRingAckIrq(TxRingPtr, IrqStatus);
  209. 	if (!(IrqStatus & XAXIDMA_IRQ_ALL_MASK)) {
  210. 		return;
  211. 	}
  212. 	if ((IrqStatus & XAXIDMA_IRQ_ERROR_MASK)) {
  213. 		XAxiDma_BdRingDumpRegs(TxRingPtr);
  214. 		Error = 1;
  215. 		//复位
  216. 		XAxiDma_Reset(&AxiDma);
  217. 		TimeOut = RESET_TIMEOUT_COUNTER;
  218. 		while (TimeOut) {
  219. 			if (XAxiDma_ResetIsDone(&AxiDma)) {break;}
  220. 			TimeOut -= 1;
  221. 		}
  222. 		return;
  223. 	}
  224. 	//无错误调用发送回调函数
  225. 	if ((IrqStatus & (XAXIDMA_IRQ_DELAY_MASK | XAXIDMA_IRQ_IOC_MASK))) {
  226. 		xil_printf("Generate tx interrupt\r\n");
  227. 		TxCallBack(TxRingPtr);
  228. 	}
  229. }
  230.  
  231. static void RxCallBack(XAxiDma_BdRing * RxRingPtr)
  232. {
  233. 	int BdCount;
  234. 	XAxiDma_Bd *BdPtr;
  235. 	XAxiDma_Bd *BdCurPtr;
  236. 	u32 BdSts;
  237. 	int Index;
  238. 	xil_printf("enter RxCallBack\r\n");
  239. 	//获取所有已处理bd
  240. 	BdCount = XAxiDma_BdRingFromHw(RxRingPtr, XAXIDMA_ALL_BDS, &BdPtr);
  241. 	//处理bd
  242. 	BdCurPtr = BdPtr;
  243. 	for (Index = 0; Index < BdCount; Index++) {
  244. 		//检查bd状态并判断是否有错误
  245. 		BdSts = XAxiDma_BdGetSts(BdCurPtr);
  246. 		if ((BdSts & XAXIDMA_BD_STS_ALL_ERR_MASK) ||
  247. 		    (!(BdSts & XAXIDMA_BD_STS_COMPLETE_MASK))) {
  248. 			Error = 1;
  249. 			break;
  250. 		}
  251. 		//查找下一个处理的bd
  252. 		BdCurPtr = (XAxiDma_Bd *)XAxiDma_BdRingNext(RxRingPtr, BdCurPtr);
  253. 		RxDone += 1;
  254. 	}
  255. }
  256.  
  257. static void RxIntrHandler(void *Callback)
  258. {
  259. 	XAxiDma_BdRing *RxRingPtr = (XAxiDma_BdRing *) Callback;
  260. 	u32 IrqStatus;
  261. 	int TimeOut;
  262. 	/* Read pending interrupts */
  263. 	IrqStatus = XAxiDma_BdRingGetIrq(RxRingPtr);
  264. 	/* Acknowledge pending interrupts */
  265. 	XAxiDma_BdRingAckIrq(RxRingPtr, IrqStatus);
  266. 	if (!(IrqStatus & XAXIDMA_IRQ_ALL_MASK)) {return;}
  267. 	if ((IrqStatus & XAXIDMA_IRQ_ERROR_MASK)) {
  268. 		XAxiDma_BdRingDumpRegs(RxRingPtr);
  269. 		Error = 1;
  270. 		XAxiDma_Reset(&AxiDma);
  271. 		TimeOut = RESET_TIMEOUT_COUNTER;
  272. 		while (TimeOut) {
  273. 			if(XAxiDma_ResetIsDone(&AxiDma)) {break;}
  274. 			TimeOut -= 1;
  275. 		}
  276. 		return;
  277. 	}
  278. 	//调用回调
  279. 	if ((IrqStatus & (XAXIDMA_IRQ_DELAY_MASK | XAXIDMA_IRQ_IOC_MASK))) {
  280. 		xil_printf("Generate rx interrupt\r\n");
  281. 		RxCallBack(RxRingPtr);
  282. 	}
  283. }
  284. //初始化中断
  285. static int SetupIntrSystem(INTC * IntcInstancePtr,
  286. 			   XAxiDma * AxiDmaPtr, u16 TxIntrId, u16 RxIntrId)
  287. {
  288. 	//获取发送/接收 环
  289. 	XAxiDma_BdRing *TxRingPtr = XAxiDma_GetTxRing(AxiDmaPtr);
  290. 	XAxiDma_BdRing *RxRingPtr = XAxiDma_GetRxRing(AxiDmaPtr);
  291. 	int Status;
  292. 	XScuGic_Config *IntcConfig;
  293. 	//查找中断控制器信息
  294. 	IntcConfig = XScuGic_LookupConfig(INTC_DEVICE_ID);
  295. 	if (NULL == IntcConfig) {
  296. 		return XST_FAILURE;
  297. 	}
  298. 	//初始化中断控制器
  299. 	Status = XScuGic_CfgInitialize(IntcInstancePtr, IntcConfig,
  300. 					IntcConfig->CpuBaseAddress);
  301. 	if (Status != XST_SUCCESS) {
  302. 		return XST_FAILURE;
  303. 	}
  304. 	//设置中断优先级
  305. 	XScuGic_SetPriorityTriggerType(IntcInstancePtr, TxIntrId, 0xA0, 0x3);
  306. 	XScuGic_SetPriorityTriggerType(IntcInstancePtr, RxIntrId, 0xA0, 0x3);
  307. 	//绑定中断处理函数
  308. 	Status = XScuGic_Connect(IntcInstancePtr, TxIntrId,
  309. 				(Xil_InterruptHandler)TxIntrHandler,
  310. 				TxRingPtr);
  311. 	if (Status != XST_SUCCESS) {
  312. 		return Status;
  313. 	}
  314. 	Status = XScuGic_Connect(IntcInstancePtr, RxIntrId,
  315. 				(Xil_InterruptHandler)RxIntrHandler,
  316. 				RxRingPtr);
  317. 	if (Status != XST_SUCCESS) {
  318. 		return Status;
  319. 	}
  320. 	//启动中断源
  321. 	XScuGic_Enable(IntcInstancePtr, TxIntrId);
  322. 	XScuGic_Enable(IntcInstancePtr, RxIntrId);
  323. 	//启动硬件中断
  324. 	Xil_ExceptionInit();
  325. 	//绑定中断异常处理函数
  326. 	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
  327. 			(Xil_ExceptionHandler)INTC_HANDLER,
  328. 			(void *)IntcInstancePtr);
  329. 	//启用IRQ异常
  330. 	Xil_ExceptionEnable();
  331. 	return XST_SUCCESS;
  332. }
  333. //禁用dma中断
  334. static void DisableIntrSystem(INTC * IntcInstancePtr,
  335. 					u16 TxIntrId, u16 RxIntrId)
  336. {
  337. 	XScuGic_Disconnect(IntcInstancePtr, TxIntrId);
  338. 	XScuGic_Disconnect(IntcInstancePtr, RxIntrId);
  339. }
  340. //设置读取通道
  341. static int RxSetup(XAxiDma * AxiDmaInstPtr)
  342. {
  343. 	XAxiDma_BdRing *RxRingPtr;
  344. 	int Status;
  345. 	XAxiDma_Bd BdTemplate;
  346. 	XAxiDma_Bd *BdPtr;
  347. 	XAxiDma_Bd *BdCurPtr;
  348. 	int BdCount;
  349. 	int FreeBdCount;
  350. 	UINTPTR RxBufferPtr;
  351. 	int Index;
  352. 	//获取接收环
  353. 	RxRingPtr = XAxiDma_GetRxRing(&AxiDma);
  354.  
  355. 	//设置空间之前禁用所有读取中断
  356. 	XAxiDma_BdRingIntDisable(RxRingPtr, XAXIDMA_IRQ_ALL_MASK);
  357. 	//设置bd空间
  358. 	BdCount = XAxiDma_BdRingCntCalc(XAXIDMA_BD_MINIMUM_ALIGNMENT,
  359. 				RX_BD_SPACE_HIGH - RX_BD_SPACE_BASE + 1);
  360. 	//创建bd环
  361. 	Status = XAxiDma_BdRingCreate(RxRingPtr, RX_BD_SPACE_BASE,RX_BD_SPACE_BASE,
  362. 					XAXIDMA_BD_MINIMUM_ALIGNMENT, BdCount);
  363. 	if (Status != XST_SUCCESS) {
  364. 		xil_printf("Rx bd create failed with %d\r\n", Status);
  365. 		return XST_FAILURE;
  366. 	}
  367. 	//为Rx通道设置BD模板。然后复制到每个RX BD。
  368. 	//bd归零
  369. 	XAxiDma_BdClear(&BdTemplate);
  370. 	//复制模板到创建的bd  模板为16个4字节数据uint32_t类型
  371. 	Status = XAxiDma_BdRingClone(RxRingPtr, &BdTemplate);
  372. 	if (Status != XST_SUCCESS) {
  373. 		xil_printf("Rx bd clone failed with %d\r\n", Status);
  374. 		return XST_FAILURE;
  375. 	}
  376. 	//在读取bd环上加上缓冲区以便读取数据
  377. 	FreeBdCount = XAxiDma_BdRingGetFreeCnt(RxRingPtr);
  378. 	Status = XAxiDma_BdRingAlloc(RxRingPtr, FreeBdCount, &BdPtr);
  379. 	if (Status != XST_SUCCESS) {
  380. 		xil_printf("Rx bd alloc failed with %d\r\n", Status);
  381. 		return XST_FAILURE;
  382. 	}
  383. 	BdCurPtr = BdPtr;
  384. 	RxBufferPtr = RX_BUFFER_BASE;
  385. 	for (Index = 0; Index < FreeBdCount; Index++) {
  386. 		//设置bd缓冲地址
  387. 		Status = XAxiDma_BdSetBufAddr(BdCurPtr, RxBufferPtr);
  388. 		if (Status != XST_SUCCESS) {
  389. 			xil_printf("Rx set buffer addr %x on BD %x failed %d\r\n",
  390. 			(unsigned int)RxBufferPtr,
  391. 			(UINTPTR)BdCurPtr, Status);
  392. 			return XST_FAILURE;
  393. 		}
  394. 		//为给定的bd设置子段长度
  395. 		Status = XAxiDma_BdSetLength(BdCurPtr, MAX_PKT_LEN,
  396. 					RxRingPtr->MaxTransferLen);
  397. 		if (Status != XST_SUCCESS) {
  398. 			xil_printf("Rx set length %d on BD %x failed %d\r\n",
  399. 			    MAX_PKT_LEN, (UINTPTR)BdCurPtr, Status);
  400. 			return XST_FAILURE;
  401. 		}
  402. 		//接收BDs不需要设置任何控件硬件会设置每个流的SOF/EOF位
  403. 		//设置bd控制位
  404. 		XAxiDma_BdSetCtrl(BdCurPtr, 0);
  405. 		//设置bd的id
  406. 		XAxiDma_BdSetId(BdCurPtr, RxBufferPtr);
  407. 		RxBufferPtr += MAX_PKT_LEN;
  408. 		BdCurPtr = (XAxiDma_Bd *)XAxiDma_BdRingNext(RxRingPtr, BdCurPtr);
  409. 	}
  410.  
  411. 	//设置合并阈值，因此只有一个接收中断在本例中出现如果你想有多个中断发生，改变 COALESCING_COUNT是一个较小的值
  412. 	//为给定的描述符环形通道设置中断合并参数。
  413. 	Status = XAxiDma_BdRingSetCoalesce(RxRingPtr, COALESCING_COUNT,DELAY_TIMER_COUNT);
  414. 	if (Status != XST_SUCCESS) {
  415. 		xil_printf("Rx set coalesce failed with %d\r\n", Status);
  416. 		return XST_FAILURE;
  417. 	}
  418. 	//将一组bd加入到分配的硬件中
  419. 	Status = XAxiDma_BdRingToHw(RxRingPtr, FreeBdCount, BdPtr);
  420. 	if (Status != XST_SUCCESS) {
  421. 		xil_printf("Rx ToHw failed with %d\r\n", Status);
  422. 		return XST_FAILURE;
  423. 	}
  424. 	//使能所有读取中断
  425. 	XAxiDma_BdRingIntEnable(RxRingPtr, XAXIDMA_IRQ_ALL_MASK);
  426. 	//启动读取dma通道
  427. 	Status = XAxiDma_BdRingStart(RxRingPtr);
  428. 	if (Status != XST_SUCCESS) {
  429. 		xil_printf("Rx start BD ring failed with %d\r\n", Status);
  430. 		return XST_FAILURE;
  431. 	}
  432. 	return XST_SUCCESS;
  433. }
  434. //设置发送
  435. static int TxSetup(XAxiDma * AxiDmaInstPtr)
  436. {
  437. 	XAxiDma_BdRing *TxRingPtr = XAxiDma_GetTxRing(&AxiDma);
  438. 	XAxiDma_Bd BdTemplate;
  439. 	int Status;
  440. 	u32 BdCount;
  441.  
  442. 	XAxiDma_BdRingIntDisable(TxRingPtr, XAXIDMA_IRQ_ALL_MASK);
  443.  
  444. 	BdCount = XAxiDma_BdRingCntCalc(XAXIDMA_BD_MINIMUM_ALIGNMENT,
  445. 			(UINTPTR)TX_BD_SPACE_HIGH - (UINTPTR)TX_BD_SPACE_BASE + 1);
  446.  
  447. 	Status = XAxiDma_BdRingCreate(TxRingPtr, TX_BD_SPACE_BASE,
  448. 				     TX_BD_SPACE_BASE,
  449. 				     XAXIDMA_BD_MINIMUM_ALIGNMENT, BdCount);
  450. 	if (Status != XST_SUCCESS) {
  451.  
  452. 		xil_printf("Failed create BD ring\r\n");
  453. 		return XST_FAILURE;
  454. 	}
  455.  
  456. 	XAxiDma_BdClear(&BdTemplate);
  457. 	Status = XAxiDma_BdRingClone(TxRingPtr, &BdTemplate);
  458. 	if (Status != XST_SUCCESS) {
  459.  
  460. 		xil_printf("Failed clone BDs\r\n");
  461. 		return XST_FAILURE;
  462. 	}
  463.  
  464. 	Status = XAxiDma_BdRingSetCoalesce(TxRingPtr, COALESCING_COUNT,
  465. 			DELAY_TIMER_COUNT);
  466. 	if (Status != XST_SUCCESS) {
  467.  
  468. 		xil_printf("Failed set coalescing"
  469. 		" %d/%d\r\n",COALESCING_COUNT, DELAY_TIMER_COUNT);
  470. 		return XST_FAILURE;
  471. 	}
  472. 	XAxiDma_BdRingIntEnable(TxRingPtr, XAXIDMA_IRQ_ALL_MASK);
  473. 	Status = XAxiDma_BdRingStart(TxRingPtr);
  474. 	if (Status != XST_SUCCESS) {
  475. 		xil_printf("Failed bd start\r\n");
  476. 		return XST_FAILURE;
  477. 	}
  478. 	return XST_SUCCESS;
  479. }
  480.  
  481. static int SendPacket(XAxiDma * AxiDmaInstPtr)
  482. {
  483. 	XAxiDma_BdRing *TxRingPtr = XAxiDma_GetTxRing(AxiDmaInstPtr);
  484. 	u8 *TxPacket;
  485. 	u8 Value;
  486. 	XAxiDma_Bd *BdPtr, *BdCurPtr;
  487. 	int Status;
  488. 	int Index, Pkts;
  489. 	UINTPTR BufferAddr;
  490. 	//限制报文长度
  491. 	if (MAX_PKT_LEN * NUMBER_OF_BDS_PER_PKT >
  492. 			TxRingPtr->MaxTransferLen) {
  493. 		xil_printf("Invalid total per packet transfer length for the "
  494. 		    "packet %d/%d\r\n",
  495. 		    MAX_PKT_LEN * NUMBER_OF_BDS_PER_PKT,
  496. 		    TxRingPtr->MaxTransferLen);
  497. 		return XST_INVALID_PARAM;
  498. 	}
  499. 	TxPacket = (u8 *) Packet;
  500. 	//发送数据
  501. 	Value = 0xC;
  502. 	for(Index = 0; Index < MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER;
  503. 								Index ++) {
  504. 		TxPacket[Index] = Value;
  505. 		Value = (Value + 1) & 0xFF;
  506. 	}
  507. 	//发送之前刷新缓冲区
  508. 	Xil_DCacheFlushRange((UINTPTR)TxPacket, MAX_PKT_LEN *
  509. 							NUMBER_OF_BDS_TO_TRANSFER);
  510. 	Xil_DCacheFlushRange((UINTPTR)RX_BUFFER_BASE, MAX_PKT_LEN *
  511. 							NUMBER_OF_BDS_TO_TRANSFER);
  512. 	Status = XAxiDma_BdRingAlloc(TxRingPtr, NUMBER_OF_BDS_TO_TRANSFER,
  513. 								&BdPtr);
  514. 	if (Status != XST_SUCCESS) {
  515. 		xil_printf("Failed bd alloc\r\n");
  516. 		return XST_FAILURE;
  517. 	}
  518. 	BufferAddr = (UINTPTR)Packet;
  519. 	BdCurPtr = BdPtr;
  520. 	/*
  521. 	 * Set up the BD using the information of the packet to transmit
  522. 	 * Each transfer has NUMBER_OF_BDS_PER_PKT BDs
  523. 	 */
  524. 	for(Index = 0; Index < NUMBER_OF_PKTS_TO_TRANSFER; Index++) {
  525. 		for(Pkts = 0; Pkts < NUMBER_OF_BDS_PER_PKT; Pkts++) {
  526. 			u32 CrBits = 0;
  527. 			//设置缓冲区地址
  528. 			Status = XAxiDma_BdSetBufAddr(BdCurPtr, BufferAddr);
  529. 			if (Status != XST_SUCCESS) {
  530. 				xil_printf("Tx set buffer addr %x on BD %x failed %d\r\n",
  531. 				(unsigned int)BufferAddr,
  532. 				(UINTPTR)BdCurPtr, Status);
  533. 				return XST_FAILURE;
  534. 			}
  535. 			//设置长度字段
  536. 			Status = XAxiDma_BdSetLength(BdCurPtr, MAX_PKT_LEN,
  537. 						TxRingPtr->MaxTransferLen);
  538. 			if (Status != XST_SUCCESS) {
  539. 				xil_printf("Tx set length %d on BD %x failed %d\r\n",
  540. 				MAX_PKT_LEN, (UINTPTR)BdCurPtr, Status);
  541. 				return XST_FAILURE;
  542. 			}
  543. 			//起始bd设置sof
  544. 			if (Pkts == 0) {
  545. 				CrBits |= XAXIDMA_BD_CTRL_TXSOF_MASK;
  546. 			}
  547. 			//最后一个bd设置eof和ioc
  548. 			if(Pkts == (NUMBER_OF_BDS_PER_PKT - 1)) {
  549. 				CrBits |= XAXIDMA_BD_CTRL_TXEOF_MASK;
  550. 			}
  551.  
  552. 			XAxiDma_BdSetCtrl(BdCurPtr, CrBits);
  553. 			XAxiDma_BdSetId(BdCurPtr, BufferAddr);
  554. 			BufferAddr += MAX_PKT_LEN;
  555. 			BdCurPtr = (XAxiDma_Bd *)XAxiDma_BdRingNext(TxRingPtr, BdCurPtr);
  556. 		}
  557. 	}
  558.  
  559. 	//将bd交给硬件
  560. 	Status = XAxiDma_BdRingToHw(TxRingPtr, NUMBER_OF_BDS_TO_TRANSFER,
  561. 						BdPtr);
  562. 	if (Status != XST_SUCCESS) {
  563. 		xil_printf("Failed to hw, length %d\r\n",
  564. 			(int)XAxiDma_BdGetLength(BdPtr,
  565. 					TxRingPtr->MaxTransferLen));
  566. 		return XST_FAILURE;
  567. 	}
  568. 	return XST_SUCCESS;
  569. }

笔者使用它进行传感器数据搬运到ddr  ps端移植freertos进行oled显示与控制

附上freertos的代码吧官方只是移植了一个框架使用重点在任务间的数据传递以及调度器的使用

  1. //
  2. /* FreeRTOS includes. */
  3. #include "FreeRTOS.h"
  4. #include "task.h"
  5. #include "queue.h"
  6. #include "timers.h"
  7.  
  8. /* Xilinx includes. */
  9. #include "xil_printf.h"
  10. #include "xparameters.h"
  11. #include "sleep.h"
  12. #include "oled_driver.h"
  13. /* user includes. */
  14. #include "sg_dma.h"
  15.  
  16. /*-----------------------------------------------------------*/
  17. static void dma_rx_Task( void *pvParameters );
  18. static void oled_Task( void *pvParameters );
  19. static void led_Task(void *pvParameters);
  20.  
  21. static TaskHandle_t dma_RxTask;
  22. static TaskHandle_t  oled;
  23. static TaskHandle_t  led;
  24. static QueueHandle_t xQueue = NULL;
  25. static QueueHandle_t led_flag = NULL;
  26. extern int rx_data_buf[4];
  27.  
  28. int main( void )
  29. {
  30. 	xil_printf( "Hello from Intelligent home system\r\n" );
  31. 	sg_dma_init();
  32. 	xTaskCreate( 	dma_rx_Task,
  33. 					( const char * ) "DMA_RX",
  34. 					configMINIMAL_STACK_SIZE,
  35. 					NULL,
  36. 					tskIDLE_PRIORITY,
  37. 					&dma_RxTask );
  38.  
  39. 	xTaskCreate( oled_Task,
  40. 				 ( const char * ) "oled",
  41. 				 configMINIMAL_STACK_SIZE,
  42. 				 NULL,
  43. 				 tskIDLE_PRIORITY+1 ,
  44. 				 &oled );
  45.  
  46. 	xTaskCreate( led_Task,
  47. 				 ( const char * ) "led",
  48. 				 configMINIMAL_STACK_SIZE,
  49. 				 NULL,
  50. 				 tskIDLE_PRIORITY+2,
  51. 				 &led );
  52. 	//创建队列
  53. 	xQueue = xQueueCreate( 	1,sizeof( rx_data_buf ) );
  54. 	led_flag = xQueueCreate( 1,3);
  55. 	//检查队列是否创建
  56. 	configASSERT( xQueue );
  57.  
  58. 	vTaskStartScheduler();
  59.  
  60. 	for( ;; );
  61. }
  62.  
  63. static void dma_rx_Task( void *pvParameters )
  64. {
  65. 	for( ;; )
  66. 	{
  67. 		rx_data();
  68. 		xil_printf("task1\r\n");
  69. 		xQueueSend( xQueue,
  70. 				rx_data_buf,
  71. 					0UL );
  72. 	}
  73. }
  74.  
  75. static void oled_Task( void *pvParameters )
  76. {
  77. 	int Recdstring[4] = {0};
  78. 	u8 key_val;
  79. 	u8 led_data[3]={0};
  80. 	for( ;; )
  81. 	{
  82. 		xil_printf("task2\r\n");
  83. 		xQueueReceive( 	xQueue,
  84. 						Recdstring,
  85. 						portMAX_DELAY );
  86. 		OLED_ShowNum(34,0,Recdstring[0],2,16);
  87. 		OLED_ShowNum(34,2,Recdstring[1],2,16);
  88. 		OLED_ShowNum(98,2,Recdstring[2],1,16);
  89. 		OLED_ShowNum(98,0,Recdstring[3],3,16);
  90.  
  91. 		if (READ == 0){
  92. 			usleep(20000);
  93. 			if (READ == 0)
  94. 			key_val = ~key_val;}while(READ == 0){}
  95. 		if(key_val){
  96. 		if(Recdstring[3]<200)
  97. 		{
  98. 			led_data[0]=1;
  99.  
  100. 		}else{
  101.  
  102. 			led_data[0]=0;
  103. 		}
  104. 		if(Recdstring[0]>28)
  105. 		{
  106. 			led_data[1]=1;
  107. 		}else{
  108. 			led_data[1]=0;
  109. 		}
  110. 		if(Recdstring[2]>50)
  111. 		{
  112. 			led_data[2]=1;
  113.  
  114. 		}else{
  115. 			led_data[2]=0;
  116. 		}
  117. 		xQueueSend( led_flag,
  118. 					led_data,
  119. 					0UL );
  120. 		}
  121. 	}
  122. }
  123.  
  124. static void led_Task(void *pvParameters)
  125. {
  126. 	u8 led[3];
  127. 	for( ;; )
  128. 	{
  129. 		xil_printf("task3\r\n");
  130. 		xQueueReceive( 	led_flag,
  131. 						led,
  132. 						portMAX_DELAY );
  133. 		if(led[0]){
  134. 			LIGHT_HGIH;
  135. 		}else{
  136. 			LIGHET_LOW;
  137. 		}
  138. 		if(led[1]){
  139. 			AIR_HIGH;
  140. 		}else{
  141. 			AIR_LOW;
  142. 		}
  143. 		if(led[2]){
  144. 			flag_HIGH;
  145. 		}else{
  146. 			flag_LOW;
  147. 		}
  148. 	}
  149. }
  150.
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