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s5pv210-nand-dm9000-dts-2_三星 s5pv210-smdkv210.dts

作者：凡人多烦事01 | 2024-03-16 04:54:31

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三星 s5pv210-smdkv210.dts

先贴出dts全文(内核linux4.19.222)

分两个文件-一个是s5pv210-smdkv210.dts

另个一是s5pv210.dtsi

第一个dts

  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3.  * Samsung's S5PV210 SoC device tree source
  4.  *
  5.  * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
  6.  *
  7.  * Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
  8.  * Tomasz Figa <t.figa@samsung.com>
  9.  *
  10.  * Board device tree source for YIC System SMDV210 board.
  11.  *
  12.  * NOTE: This file is completely based on original board file for mach-smdkv210
  13.  * available in Linux 3.15 and intends to provide equivalent level of hardware
  14.  * support. Due to lack of hardware, _no_ testing has been performed.
  15.  */
  17. /dts-v1/;
  18. #include <dt-bindings/input/input.h>
  19. #include "s5pv210.dtsi"
  20.  
  21. / {
  22. 	model = "YIC System SMDKV210 based on S5PV210";
  23. 	compatible = "yic,smdkv210", "samsung,s5pv210";
  24.  
  25. 	chosen {
  26. 		bootargs = "console=ttySAC0,115200n8 root=/dev/nfs nfsroot=192.168.88.8:/home/zhi/s5pv210/rootfs,v3 rw ip=192.168.88.123:192.168.88.8:192.168.88.1:255.255.255.0::eth0:off rw root wait ignore_loglevel earlyprintk"; //"console=ttySAC0,115200n8 root=/dev/mmcblk0p1 rw rootwait ignore_loglevel earlyprintk";
  27. 	};
  28.  
  29. 	memory@30000000 {
  30. 		device_type = "memory";
  31. 		reg = <0x30000000 0x20000000>;
  32. 	};
  33. /*
  34. 	ethernet@88000000 {
  35. 		compatible = "davicom,dm9000";
  36. 		reg = <0x88000000 0x2 0x88000004 0x2>;
  37. 		interrupt-parent = <&gph0>;
  38. 		interrupts = <7 4>;
  39. 		local-mac-address = [50 60 de ad be ef];
  40. 		davicom,no-eeprom;
  41. 		clocks = <&clocks CLK_SROMC>;
  42. 		clock-names = "sromc";
  43. 	};
  44. */
  45. 	backlight {
  46. 		compatible = "pwm-backlight";
  47. 		pwms = <&pwm 3 5000000 0>;
  48. 		brightness-levels = <0 4 8 16 32 64 128 255>;
  49. 		default-brightness-level = <6>;
  50. 		pinctrl-names = "default";
  51. 		pinctrl-0 = <&pwm3_out>;
  52. 	};
  53. /*
  54.     srom-cs2@e8000000 {
  55. 		compatible = "simple-bus";
  56. 		#address-cells = <1>;
  57. 		#size-cells = <1>;
  58. 		reg = <0xe8000000 0x80>;
  59. 		ranges;
  60.  
  61. 		nand: nand@B0E00000 {
  62. 			compatible = "samsung,s5pv210-nand";
  63. 			reg = <0xb0e00000 0x2000>,
  64. 			interrupt-parent = <&vic1>;
  65. 			interrupts = <31>;
  66. 			clocks = <&clocks CLK_SROMC>;
  67. 			clock-names = "nand";
  68. 			#address-cells = <1>;
  69. 			#size-cells = <1>;           
  70. 			status = "okay"; // "disabled";
  71. 		};
  72. 	};
  73.     */
  74. };
  75.  
  76. &xusbxti {
  77. 	clock-frequency = <24000000>;
  78. };
  79.  
  80. &xxti {
  81. 	clock-frequency = <24000000>;
  82. };
  83.  
  84.  
  85.  
  86. &pinctrl0 {
  87. 	srom_ctl: srom-ctl {
  88. 		samsung,pins = "mp01-1",  "mp01-6",
  89. 			                  "mp01-7", "mp02-2";
  90. 		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
  91. 		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
  92. 	};
  93.  
  94. 	srom_ebi: srom-ebi {
  95. 		samsung,pins = "mp04-0", "mp04-1", "mp04-2", "mp04-3",
  96. 			       "mp04-4", "mp04-5", "mp04-6", "mp04-7",
  97. 			       "mp05-0", "mp05-1", "mp05-2", "mp05-3",
  98. 			       "mp05-4", "mp05-5", "mp05-6", "mp05-7",
  99. 			       "mp06-0", "mp06-1", "mp06-2", "mp06-3",
  100. 			       "mp06-4", "mp06-5", "mp06-6", "mp06-7",
  101.                                 "mp07-0", "mp07-1", "mp07-2", "mp07-3",
  102. 			       "mp07-4", "mp07-5", "mp07-6", "mp07-7";
  103. 		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
  104. 		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
  105. 		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
  106. 	};
  107.     nandc_ctl: nandc-ctl {
  108. 		samsung,pins = "mp01-2", "mp03-0", "mp03-1",
  109. 			       "mp03-2", "mp03-3", "mp03-4";
  110. 		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
  111. 		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
  112. 		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
  113. 	};
  114.     nandc_ebi: nandc-ebi {
  115. 		samsung,pins = 
  116. 			       "mp06-0", "mp06-1", "mp06-2", "mp06-3",
  117. 			       "mp06-4", "mp06-5", "mp06-6", "mp06-7";
  118. 		samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
  119. 		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
  120. 		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
  121. 	};
  122. };
  123.  
  124.  
  125.  
  126.  
  127.  
  128. &sromc {
  129. 	pinctrl-names = "default";
  130. 	pinctrl-0 = <&srom_ctl>, <&srom_ebi>;
  131.     status = "okay";
  132. 	
  133.     ethernet@1,0 {
  134. 		compatible = "davicom,dm9000";
  135.         reg = <1 0 2   /* addr */
  136.             1 4 2>; /* data */
  137. 		interrupt-parent = <&gph0>;
  138. 		interrupts = <7 4>;
  139. 		local-mac-address = [50 60 de ad be ef];
  140. 		davicom,no-eeprom;
  141.  
  142. 	    reg-io-width = <2>;    //16位模式
  143.  
  144. 		samsung,waitable;
  145. 		samsung,srom-timing = <0 0 1 3 1 0>;
  146. 	};
  147.     
  148. 	
  149. };
  150.  
  151.  
  152.  
  153. &nandc {
  154.     status = "okay"; // "disabled";
  155.   
  156.  
  157.     samsung,nandc-tacls=<1>;
  158.     samsung,nandc-twrph0=<2>;
  159.     samsung,nandc-twrph1=<1>;
  160.  
  161.  
  162.     nand@0 {
  163.         nand-ecc-step-size = <512>;   //每页2k，每512字节生成ecc，需要16自己存储
  164. 		nand-ecc-strength = <8>;    //最大8bit的纠错位数，每页需要64字节的oob存储
  165. 		nand-ecc-mode = "hw";
  166. 		nand-on-flash-bbt;
  167. 		nand-is-boot-medium;
  168.         nand-bus-width = <8>;
  169.  
  170.         pinctrl-names = "default";
  171.         pinctrl-0 = <&nandc_ctl>, <&nandc_ebi>;
  172.  
  173.         
  174.         partitions {
  175.         compatible = "fixed-partitions";
  176.         #address-cells = <1>;
  177.         #size-cells = <1>;
  178.  
  179.             partition@0 {
  180.                 label = "u-boot";
  181.                 reg = <0x0 0xc0000 >;
  182.             };
  183.  
  184.             partition@c0000 {
  185.                 label = "u-boot-env";
  186.                 reg = <0xc0000  0x40000>;
  187.             };
  188.  
  189.             partition@100000 {
  190.                 label = "dtb";
  191.                 reg = <0x100000 0x080000>;   
  192.             };
  193.  
  194.             partition@180000 {
  195.                 label = "kernel";
  196.                 reg = <0x180000 0x500000>;
  197.             };
  198.  
  199.             partition@680000 {
  200.                 label = "rootfs";
  201.                 reg = <0x680000 0x3f980000 >;   //最大1G
  202.             };
  203.         };
  204.     };
  205. };
  206.  
  207.  
  208.  
  209.  
  210. &keypad {
  211. 	linux,input-no-autorepeat;
  212. 	wakeup-source;
  213. 	samsung,keypad-num-rows = <8>;
  214. 	samsung,keypad-num-columns = <8>;
  215. 	pinctrl-names = "default";
  216. 	pinctrl-0 = <&keypad_row0>, <&keypad_row1>, <&keypad_row2>,
  217. 			<&keypad_row3>, <&keypad_row4>, <&keypad_row5>,
  218. 			<&keypad_row6>, <&keypad_row7>,
  219. 			<&keypad_col0>, <&keypad_col1>, <&keypad_col2>,
  220. 			<&keypad_col3>, <&keypad_col4>, <&keypad_col5>,
  221. 			<&keypad_col6>, <&keypad_col7>;
  222. 	status = "okay";
  223.  
  224. 	key_1 {
  225. 		keypad,row = <0>;
  226. 		keypad,column = <3>;
  227. 		linux,code = <KEY_1>;
  228. 	};
  229.  
  230. 	key_2 {
  231. 		keypad,row = <0>;
  232. 		keypad,column = <4>;
  233. 		linux,code = <KEY_2>;
  234. 	};
  235.  
  236. 	key_3 {
  237. 		keypad,row = <0>;
  238. 		keypad,column = <5>;
  239. 		linux,code = <KEY_3>;
  240. 	};
  241.  
  242. 	key_4 {
  243. 		keypad,row = <0>;
  244. 		keypad,column = <6>;
  245. 		linux,code = <KEY_4>;
  246. 	};
  247.  
  248. 	key_5 {
  249. 		keypad,row = <0
  250. 		>;
  251. 		keypad,column = <7>;
  252. 		linux,code = <KEY_5>;
  253. 	};
  254.  
  255. 	key_6 {
  256. 		keypad,row = <1>;
  257. 		keypad,column = <3>;
  258. 		linux,code = <KEY_A>;
  259. 	};
  260. 	key_7 {
  261. 		keypad,row = <1>;
  262. 		keypad,column = <4>;
  263. 		linux,code = <KEY_B>;
  264. 	};
  265.  
  266. 	key_8 {
  267. 		keypad,row = <1>;
  268. 		keypad,column = <5>;
  269. 		linux,code = <KEY_C>;
  270. 	};
  271.  
  272. 	key_9 {
  273. 		keypad,row = <1>;
  274. 		keypad,column = <6>;
  275. 		linux,code = <KEY_D>;
  276. 	};
  277.  
  278. 	key_10 {
  279. 		keypad,row = <1>;
  280. 		keypad,column = <7>;
  281. 		linux,code = <KEY_E>;
  282. 	};
  283. };
  284.  
  285. &uart0 {
  286. 	status = "okay";
  287. };
  288.  
  289. &uart1 {
  290. 	status = "okay";
  291. };
  292.  
  293. &uart2 {
  294. 	status = "okay";
  295. };
  296.  
  297. &uart3 {
  298. 	status = "okay";
  299. };
  300.  
  301. &rtc {
  302. 	status = "okay";
  303. };
  304.  
  305. &sdhci0 {
  306. 	bus-width = <4>;
  307. 	pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_bus1 &sd0_bus4>;
  308. 	pinctrl-names = "default";
  309. 	status = "okay";
  310. };
  311.  
  312. &sdhci1 {
  313. 	bus-width = <4>;
  314. 	pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_bus1 &sd1_bus4>;
  315. 	pinctrl-names = "default";
  316. 	status = "okay";
  317. };
  318.  
  319. &sdhci2 {
  320. 	bus-width = <4>;
  321. 	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
  322. 	pinctrl-names = "default";
  323. 	status = "okay";
  324. };
  325.  
  326. &sdhci3 {
  327. 	bus-width = <4>;
  328. 	pinctrl-0 = <&sd3_clk &sd3_cmd &sd3_cd &sd3_bus1 &sd3_bus4>;
  329. 	pinctrl-names = "default";
  330. 	status = "okay";
  331. };
  332.  
  333. &hsotg {
  334. 	dr_mode = "peripheral";
  335. 	status = "okay";
  336. };
  337.  
  338. &usbphy {
  339. 	status = "okay";
  340. };
  341.  
  342. &fimd {
  343. 	pinctrl-0 = <&lcd_clk &lcd_data24>;
  344. 	pinctrl-names = "default";
  345. 	status = "okay";
  346.  
  347. 	display-timings {
  348. 		native-mode = <&timing0>;
  349.  
  350. 		timing0: timing {
  351. 			/* 800x480@60Hz */
  352. 			clock-frequency = <24373920>;
  353. 			hactive = <800>;
  354. 			vactive = <480>;
  355. 			hfront-porch = <8>;
  356. 			hback-porch = <13>;
  357. 			hsync-len = <3>;
  358. 			vback-porch = <7>;
  359. 			vfront-porch = <5>;
  360. 			vsync-len = <1>;
  361. 			hsync-active = <0>;
  362. 			vsync-active = <0>;
  363. 			de-active = <1>;
  364. 			pixelclk-active = <1>;
  365. 		};
  366. 	};
  367. };
  368.  
  369. &pwm {
  370. 	samsung,pwm-outputs = <3>;
  371. };
  372.  
  373. &i2c0 {
  374. 	status = "okay";
  375.  
  376. 	audio-codec@1b {
  377. 		compatible = "wlf,wm8580";
  378. 		reg = <0x1b>;
  379. 	};
  380.  
  381. 	eeprom@50 {
  382. 		compatible = "atmel,24c08";
  383. 		reg = <0x50>;
  384. 	};
  385. };
  386.  
  387. &i2s0 {
  388. 	status = "okay";
  389. };
  390.  
  391.  
  392.  
  393.  
  394.

第二个，dtsi

  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3.  * Samsung's S5PV210 SoC device tree source
  4.  *
  5.  * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
  6.  *
  7.  * Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
  8.  * Tomasz Figa <t.figa@samsung.com>
  9.  *
  10.  * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
  11.  * based board files can include this file and provide values for board specfic
  12.  * bindings.
  13.  *
  14.  * Note: This file does not include device nodes for all the controllers in
  15.  * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional
  16.  * nodes can be added to this file.
  17.  */
  19. #include <dt-bindings/clock/s5pv210.h>
  20. #include <dt-bindings/clock/s5pv210-audss.h>
  21.  
  22. / {
  23. 	#address-cells = <1>;
  24. 	#size-cells = <1>;
  25.  
  26. 	aliases {
  27. 		csis0 = &csis0;
  28. 		fimc0 = &fimc0;
  29. 		fimc1 = &fimc1;
  30. 		fimc2 = &fimc2;
  31. 		i2c0 = &i2c0;
  32. 		i2c1 = &i2c1;
  33. 		i2c2 = &i2c2;
  34. 		i2s0 = &i2s0;
  35. 		i2s1 = &i2s1;
  36. 		i2s2 = &i2s2;
  37. 		pinctrl0 = &pinctrl0;
  38. 		spi0 = &spi0;
  39. 		spi1 = &spi1;
  40. 	};
  41.  
  42. 	cpus {
  43. 		#address-cells = <1>;
  44. 		#size-cells = <0>;
  45.  
  46. 		cpu@0 {
  47. 			device_type = "cpu";
  48. 			compatible = "arm,cortex-a8";
  49. 			reg = <0>;
  50. 		};
  51. 	};
  52.  
  53. 	soc {
  54. 		compatible = "simple-bus";
  55. 		#address-cells = <1>;
  56. 		#size-cells = <1>;
  57. 		ranges;
  58.  
  59. 		external-clocks {
  60. 			compatible = "simple-bus";
  61. 			#address-cells = <1>;
  62. 			#size-cells = <0>;
  63.  
  64. 			xxti: oscillator@0 {
  65. 				compatible = "fixed-clock";
  66. 				reg = <0>;
  67. 				clock-frequency = <0>;
  68. 				clock-output-names = "xxti";
  69. 				#clock-cells = <0>;
  70. 			};
  71.  
  72. 			xusbxti: oscillator@1 {
  73. 				compatible = "fixed-clock";
  74. 				reg = <1>;
  75. 				clock-frequency = <0>;
  76. 				clock-output-names = "xusbxti";
  77. 				#clock-cells = <0>;
  78. 			};
  79. 		};
  80.  
  81. 		onenand: onenand@b0000000 {
  82. 			compatible = "samsung,s5pv210-onenand";
  83. 			reg = <0xb0600000 0x2000>,
  84. 				<0xb0000000 0x20000>,
  85. 				<0xb0040000 0x20000>;
  86. 			interrupt-parent = <&vic1>;
  87. 			interrupts = <31>;
  88. 			clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
  89. 			clock-names = "bus", "onenand";
  90. 			#address-cells = <1>;
  91. 			#size-cells = <1>;
  92. 			status = "disabled";
  93. 		};
  94.        
  95.  
  96. 		chipid@e0000000 {
  97. 			compatible = "samsung,s5pv210-chipid";
  98. 			reg = <0xe0000000 0x1000>;
  99. 		};
  100.  
  101. 		clocks: clock-controller@e0100000 {
  102. 			compatible = "samsung,s5pv210-clock";
  103. 			reg = <0xe0100000 0x10000>;
  104. 			clock-names = "xxti", "xusbxti";
  105. 			clocks = <&xxti>, <&xusbxti>;
  106. 			#clock-cells = <1>;
  107. 		};
  108.  
  109. 		pmu_syscon: syscon@e0108000 {
  110. 			compatible = "samsung-s5pv210-pmu", "syscon";
  111. 			reg = <0xe0108000 0x8000>;
  112. 		};
  113.  
  114. 		pinctrl0: pinctrl@e0200000 {
  115. 			compatible = "samsung,s5pv210-pinctrl";
  116. 			reg = <0xe0200000 0x1000>;
  117. 			interrupt-parent = <&vic0>;
  118. 			interrupts = <30>;
  119.  
  120. 			wakeup-interrupt-controller {
  121. 				compatible = "samsung,exynos4210-wakeup-eint";
  122. 				interrupts = <16>;
  123. 				interrupt-parent = <&vic0>;
  124. 			};
  125. 		};
  126.  
  127. 		pdma0: dma@e0900000 {
  128. 			compatible = "arm,pl330", "arm,primecell";
  129. 			reg = <0xe0900000 0x1000>;
  130. 			interrupt-parent = <&vic0>;
  131. 			interrupts = <19>;
  132. 			clocks = <&clocks CLK_PDMA0>;
  133. 			clock-names = "apb_pclk";
  134. 			#dma-cells = <1>;
  135. 			#dma-channels = <8>;
  136. 			#dma-requests = <32>;
  137. 		};
  138.  
  139. 		pdma1: dma@e0a00000 {
  140. 			compatible = "arm,pl330", "arm,primecell";
  141. 			reg = <0xe0a00000 0x1000>;
  142. 			interrupt-parent = <&vic0>;
  143. 			interrupts = <20>;
  144. 			clocks = <&clocks CLK_PDMA1>;
  145. 			clock-names = "apb_pclk";
  146. 			#dma-cells = <1>;
  147. 			#dma-channels = <8>;
  148. 			#dma-requests = <32>;
  149. 		};
  150.  
  151. 		spi0: spi@e1300000 {
  152. 			compatible = "samsung,s5pv210-spi";
  153. 			reg = <0xe1300000 0x1000>;
  154. 			interrupt-parent = <&vic1>;
  155. 			interrupts = <15>;
  156. 			dmas = <&pdma0 7>, <&pdma0 6>;
  157. 			dma-names = "tx", "rx";
  158. 			clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>;
  159. 			clock-names = "spi", "spi_busclk0";
  160. 			pinctrl-names = "default";
  161. 			pinctrl-0 = <&spi0_bus>;
  162. 			#address-cells = <1>;
  163. 			#size-cells = <0>;
  164. 			status = "disabled";
  165. 		};
  166.  
  167. 		spi1: spi@e1400000 {
  168. 			compatible = "samsung,s5pv210-spi";
  169. 			reg = <0xe1400000 0x1000>;
  170. 			interrupt-parent = <&vic1>;
  171. 			interrupts = <16>;
  172. 			dmas = <&pdma1 7>, <&pdma1 6>;
  173. 			dma-names = "tx", "rx";
  174. 			clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>;
  175. 			clock-names = "spi", "spi_busclk0";
  176. 			pinctrl-names = "default";
  177. 			pinctrl-0 = <&spi1_bus>;
  178. 			#address-cells = <1>;
  179. 			#size-cells = <0>;
  180. 			status = "disabled";
  181. 		};
  182.  
  183. 		keypad: keypad@e1600000 {
  184. 			compatible = "samsung,s5pv210-keypad";
  185. 			reg = <0xe1600000 0x1000>;
  186. 			interrupt-parent = <&vic2>;
  187. 			interrupts = <25>;
  188. 			clocks = <&clocks CLK_KEYIF>;
  189. 			clock-names = "keypad";
  190. 			status = "disabled";
  191. 		};
  192.  
  193. 		i2c0: i2c@e1800000 {
  194. 			compatible = "samsung,s3c2440-i2c";
  195. 			reg = <0xe1800000 0x1000>;
  196. 			interrupt-parent = <&vic1>;
  197. 			interrupts = <14>;
  198. 			clocks = <&clocks CLK_I2C0>;
  199. 			clock-names = "i2c";
  200. 			pinctrl-names = "default";
  201. 			pinctrl-0 = <&i2c0_bus>;
  202. 			#address-cells = <1>;
  203. 			#size-cells = <0>;
  204. 			status = "disabled";
  205. 		};
  206.  
  207. 		i2c2: i2c@e1a00000 {
  208. 			compatible = "samsung,s3c2440-i2c";
  209. 			reg = <0xe1a00000 0x1000>;
  210. 			interrupt-parent = <&vic1>;
  211. 			interrupts = <19>;
  212. 			clocks = <&clocks CLK_I2C2>;
  213. 			clock-names = "i2c";
  214. 			pinctrl-0 = <&i2c2_bus>;
  215. 			pinctrl-names = "default";
  216. 			#address-cells = <1>;
  217. 			#size-cells = <0>;
  218. 			status = "disabled";
  219. 		};
  220.  
  221. 		clk_audss: clock-controller@eee10000 {
  222. 			compatible = "samsung,s5pv210-audss-clock";
  223. 			reg = <0xeee10000 0x1000>;
  224. 			clock-names = "hclk", "xxti",
  225. 				      "fout_epll",
  226. 				      "sclk_audio0";
  227. 			clocks = <&clocks DOUT_HCLKP>, <&xxti>,
  228. 				 <&clocks FOUT_EPLL>,
  229. 				 <&clocks SCLK_AUDIO0>;
  230. 			#clock-cells = <1>;
  231. 		};
  232.  
  233. 		i2s0: i2s@eee30000 {
  234. 			compatible = "samsung,s5pv210-i2s";
  235. 			reg = <0xeee30000 0x1000>;
  236. 			interrupt-parent = <&vic2>;
  237. 			interrupts = <16>;
  238. 			dma-names = "rx", "tx", "tx-sec";
  239. 			dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>;
  240. 			clock-names = "iis",
  241. 				      "i2s_opclk0",
  242. 				      "i2s_opclk1";
  243. 			clocks = <&clk_audss CLK_I2S>,
  244. 				 <&clk_audss CLK_I2S>,
  245. 				 <&clk_audss CLK_DOUT_AUD_BUS>;
  246. 			samsung,idma-addr = <0xc0010000>;
  247. 			pinctrl-names = "default";
  248. 			pinctrl-0 = <&i2s0_bus>;
  249. 			#sound-dai-cells = <0>;
  250. 			status = "disabled";
  251. 		};
  252.  
  253. 		i2s1: i2s@e2100000 {
  254. 			compatible = "samsung,s3c6410-i2s";
  255. 			reg = <0xe2100000 0x1000>;
  256. 			interrupt-parent = <&vic2>;
  257. 			interrupts = <17>;
  258. 			dma-names = "rx", "tx";
  259. 			dmas = <&pdma1 12>, <&pdma1 13>;
  260. 			clock-names = "iis", "i2s_opclk0";
  261. 			clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>;
  262. 			pinctrl-names = "default";
  263. 			pinctrl-0 = <&i2s1_bus>;
  264. 			#sound-dai-cells = <0>;
  265. 			status = "disabled";
  266. 		};
  267.  
  268. 		i2s2: i2s@e2a00000 {
  269. 			compatible = "samsung,s3c6410-i2s";
  270. 			reg = <0xe2a00000 0x1000>;
  271. 			interrupt-parent = <&vic2>;
  272. 			interrupts = <18>;
  273. 			dma-names = "rx", "tx";
  274. 			dmas = <&pdma1 14>, <&pdma1 15>;
  275. 			clock-names = "iis", "i2s_opclk0";
  276. 			clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>;
  277. 			pinctrl-names = "default";
  278. 			pinctrl-0 = <&i2s2_bus>;
  279. 			#sound-dai-cells = <0>;
  280. 			status = "disabled";
  281. 		};
  282.  
  283. 		pwm: pwm@e2500000 {
  284. 			compatible = "samsung,s5pc100-pwm";
  285. 			reg = <0xe2500000 0x1000>;
  286. 			interrupt-parent = <&vic0>;
  287. 			interrupts = <21>, <22>, <23>, <24>, <25>;
  288. 			clock-names = "timers";
  289. 			clocks = <&clocks CLK_PWM>;
  290. 			#pwm-cells = <3>;
  291. 		};
  292.  
  293. 		watchdog: watchdog@e2700000 {
  294. 			compatible = "samsung,s3c6410-wdt";
  295. 			reg = <0xe2700000 0x1000>;
  296. 			interrupt-parent = <&vic0>;
  297. 			interrupts = <26>;
  298. 			clock-names = "watchdog";
  299. 			clocks = <&clocks CLK_WDT>;
  300. 		};
  301.  
  302. 		rtc: rtc@e2800000 {
  303. 			compatible = "samsung,s3c6410-rtc";
  304. 			reg = <0xe2800000 0x100>;
  305. 			interrupt-parent = <&vic0>;
  306. 			interrupts = <28>, <29>;
  307. 			clocks = <&clocks CLK_RTC>;
  308. 			clock-names = "rtc";
  309. 			status = "disabled";
  310. 		};
  311.  
  312. 		uart0: serial@e2900000 {
  313. 			compatible = "samsung,s5pv210-uart";
  314. 			reg = <0xe2900000 0x400>;
  315. 			interrupt-parent = <&vic1>;
  316. 			interrupts = <10>;
  317. 			clock-names = "uart", "clk_uart_baud0",
  318. 					"clk_uart_baud1";
  319. 			clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>,
  320. 					<&clocks SCLK_UART0>;
  321. 			status = "disabled";
  322. 		};
  323.  
  324. 		uart1: serial@e2900400 {
  325. 			compatible = "samsung,s5pv210-uart";
  326. 			reg = <0xe2900400 0x400>;
  327. 			interrupt-parent = <&vic1>;
  328. 			interrupts = <11>;
  329. 			clock-names = "uart", "clk_uart_baud0",
  330. 					"clk_uart_baud1";
  331. 			clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>,
  332. 					<&clocks SCLK_UART1>;
  333. 			status = "disabled";
  334. 		};
  335.  
  336. 		uart2: serial@e2900800 {
  337. 			compatible = "samsung,s5pv210-uart";
  338. 			reg = <0xe2900800 0x400>;
  339. 			interrupt-parent = <&vic1>;
  340. 			interrupts = <12>;
  341. 			clock-names = "uart", "clk_uart_baud0",
  342. 					"clk_uart_baud1";
  343. 			clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>,
  344. 					<&clocks SCLK_UART2>;
  345. 			status = "disabled";
  346. 		};
  347.  
  348. 		uart3: serial@e2900c00 {
  349. 			compatible = "samsung,s5pv210-uart";
  350. 			reg = <0xe2900c00 0x400>;
  351. 			interrupt-parent = <&vic1>;
  352. 			interrupts = <13>;
  353. 			clock-names = "uart", "clk_uart_baud0",
  354. 					"clk_uart_baud1";
  355. 			clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>,
  356. 					<&clocks SCLK_UART3>;
  357. 			status = "disabled";
  358. 		};
  359.         sromc: memory-controller@e8000000 {    //2022-0103 dazhi add
  360. 			compatible = "samsung,exynos4210-srom";
  361. 			reg = <0xe8000000 0x1c>;
  362.             #address-cells = <2>;
  363. 			#size-cells = <1>;
  364.             ranges = <0 0 0x80000000 0x8000000
  365. 			  1 0 0x88000000 0x8000000
  366. 			  2 0 0xb0e00000 0xb0e20130
  367. 			  3 0 0x98000000 0x8000000
  368. 			  4 0 0xa0000000 0x8000000
  369. 			  5 0 0xa8000000 0x8000000>;
  370.  
  371. 	    	clocks = <&clocks CLK_SROMC>;
  372. 		    clock-names = "sromc";
  373.             status = "disabled";
  374. 		};
  375.  
  376.  
  377.         nandc: nand-controller@b0e00000 {
  378.             compatible = "samsung,s5pv210-nand";
  379.             reg = <0xb0e00000 0x00020130>;
  380.             status =  "disabled";
  381.             clocks = <&clocks CLK_NFCON>;
  382.             clock-names = "nand";
  383.             #address-cells = <1>;
  384.             #size-cells = <1>;
  385.         };
  386.  
  387. 		sdhci0: sdhci@eb000000 {
  388. 			compatible = "samsung,s3c6410-sdhci";
  389. 			reg = <0xeb000000 0x100000>;
  390. 			interrupt-parent = <&vic1>;
  391. 			interrupts = <26>;
  392. 			clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
  393. 			clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>,
  394. 					<&clocks SCLK_MMC0>;
  395. 			status = "disabled";
  396. 		};
  397.  
  398. 		sdhci1: sdhci@eb100000 {
  399. 			compatible = "samsung,s3c6410-sdhci";
  400. 			reg = <0xeb100000 0x100000>;
  401. 			interrupt-parent = <&vic1>;
  402. 			interrupts = <27>;
  403. 			clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
  404. 			clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>,
  405. 					<&clocks SCLK_MMC1>;
  406. 			status = "disabled";
  407. 		};
  408.  
  409. 		sdhci2: sdhci@eb200000 {
  410. 			compatible = "samsung,s3c6410-sdhci";
  411. 			reg = <0xeb200000 0x100000>;
  412. 			interrupt-parent = <&vic1>;
  413. 			interrupts = <28>;
  414. 			clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
  415. 			clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>,
  416. 					<&clocks SCLK_MMC2>;
  417. 			status = "disabled";
  418. 		};
  419.  
  420. 		sdhci3: sdhci@eb300000 {
  421. 			compatible = "samsung,s3c6410-sdhci";
  422. 			reg = <0xeb300000 0x100000>;
  423. 			interrupt-parent = <&vic3>;
  424. 			interrupts = <2>;
  425. 			clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3";
  426. 			clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>,
  427. 					<&clocks SCLK_MMC3>;
  428. 			status = "disabled";
  429. 		};
  430.  
  431. 		hsotg: hsotg@ec000000 {
  432. 			compatible = "samsung,s3c6400-hsotg";
  433. 			reg = <0xec000000 0x20000>;
  434. 			interrupt-parent = <&vic1>;
  435. 			interrupts = <24>;
  436. 			clocks = <&clocks CLK_USB_OTG>;
  437. 			clock-names = "otg";
  438. 			phy-names = "usb2-phy";
  439. 			phys = <&usbphy 0>;
  440. 			status = "disabled";
  441. 		};
  442.  
  443. 		usbphy: usbphy@ec100000 {
  444. 			compatible = "samsung,s5pv210-usb2-phy";
  445. 			reg = <0xec100000 0x100>;
  446. 			samsung,pmureg-phandle = <&pmu_syscon>;
  447. 			clocks = <&clocks CLK_USB_OTG>, <&xusbxti>;
  448. 			clock-names = "phy", "ref";
  449. 			#phy-cells = <1>;
  450. 			status = "disabled";
  451. 		};
  452.  
  453. 		ehci: ehci@ec200000 {
  454. 			compatible = "samsung,exynos4210-ehci";
  455. 			reg = <0xec200000 0x100>;
  456. 			interrupts = <23>;
  457. 			interrupt-parent = <&vic1>;
  458. 			clocks = <&clocks CLK_USB_HOST>;
  459. 			clock-names = "usbhost";
  460. 			#address-cells = <1>;
  461. 			#size-cells = <0>;
  462. 			status = "disabled";
  463.  
  464. 			port@0 {
  465. 				reg = <0>;
  466. 				phys = <&usbphy 1>;
  467. 			};
  468. 		};
  469.  
  470. 		ohci: ohci@ec300000 {
  471. 			compatible = "samsung,exynos4210-ohci";
  472. 			reg = <0xec300000 0x100>;
  473. 			interrupts = <23>;
  474. 			interrupt-parent = <&vic1>;
  475. 			clocks = <&clocks CLK_USB_HOST>;
  476. 			clock-names = "usbhost";
  477. 			#address-cells = <1>;
  478. 			#size-cells = <0>;
  479. 			status = "disabled";
  480.  
  481. 			port@0 {
  482. 				reg = <0>;
  483. 				phys = <&usbphy 1>;
  484. 			};
  485. 		};
  486.  
  487. 		mfc: codec@f1700000 {
  488. 			compatible = "samsung,mfc-v5";
  489. 			reg = <0xf1700000 0x10000>;
  490. 			interrupt-parent = <&vic2>;
  491. 			interrupts = <14>;
  492. 			clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>;
  493. 			clock-names = "sclk_mfc", "mfc";
  494. 		};
  495.  
  496. 		vic0: interrupt-controller@f2000000 {
  497. 			compatible = "arm,pl192-vic";
  498. 			interrupt-controller;
  499. 			reg = <0xf2000000 0x1000>;
  500. 			#interrupt-cells = <1>;
  501. 		};
  502.  
  503. 		vic1: interrupt-controller@f2100000 {
  504. 			compatible = "arm,pl192-vic";
  505. 			interrupt-controller;
  506. 			reg = <0xf2100000 0x1000>;
  507. 			#interrupt-cells = <1>;
  508. 		};
  509.  
  510. 		vic2: interrupt-controller@f2200000 {
  511. 			compatible = "arm,pl192-vic";
  512. 			interrupt-controller;
  513. 			reg = <0xf2200000 0x1000>;
  514. 			#interrupt-cells = <1>;
  515. 		};
  516.  
  517. 		vic3: interrupt-controller@f2300000 {
  518. 			compatible = "arm,pl192-vic";
  519. 			interrupt-controller;
  520. 			reg = <0xf2300000 0x1000>;
  521. 			#interrupt-cells = <1>;
  522. 		};
  523.  
  524. 		fimd: fimd@f8000000 {
  525. 			compatible = "samsung,exynos4210-fimd";
  526. 			interrupt-parent = <&vic2>;
  527. 			reg = <0xf8000000 0x20000>;
  528. 			interrupt-names = "fifo", "vsync", "lcd_sys";
  529. 			interrupts = <0>, <1>, <2>;
  530. 			clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>;
  531. 			clock-names = "sclk_fimd", "fimd";
  532. 			status = "disabled";
  533. 		};
  534.  
  535. 		g2d: g2d@fa000000 {
  536. 			compatible = "samsung,s5pv210-g2d";
  537. 			reg = <0xfa000000 0x1000>;
  538. 			interrupt-parent = <&vic2>;
  539. 			interrupts = <9>;
  540. 			clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>;
  541. 			clock-names = "sclk_fimg2d", "fimg2d";
  542. 		};
  543.  
  544. 		mdma1: mdma@fa200000 {
  545. 			compatible = "arm,pl330", "arm,primecell";
  546. 			reg = <0xfa200000 0x1000>;
  547. 			interrupt-parent = <&vic0>;
  548. 			interrupts = <18>;
  549. 			clocks = <&clocks CLK_MDMA>;
  550. 			clock-names = "apb_pclk";
  551. 			#dma-cells = <1>;
  552. 			#dma-channels = <8>;
  553. 			#dma-requests = <1>;
  554. 		};
  555.  
  556. 		i2c1: i2c@fab00000 {
  557. 			compatible = "samsung,s3c2440-i2c";
  558. 			reg = <0xfab00000 0x1000>;
  559. 			interrupt-parent = <&vic2>;
  560. 			interrupts = <13>;
  561. 			clocks = <&clocks CLK_I2C1>;
  562. 			clock-names = "i2c";
  563. 			pinctrl-names = "default";
  564. 			pinctrl-0 = <&i2c1_bus>;
  565. 			#address-cells = <1>;
  566. 			#size-cells = <0>;
  567. 			status = "disabled";
  568. 		};
  569.  
  570. 		camera: camera {
  571. 			compatible = "samsung,fimc", "simple-bus";
  572. 			pinctrl-names = "default";
  573. 			pinctrl-0 = <>;
  574. 			clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>;
  575. 			clock-names = "sclk_cam0", "sclk_cam1";
  576. 			#address-cells = <1>;
  577. 			#size-cells = <1>;
  578. 			ranges;
  579.  
  580. 			clock_cam: clock-controller {
  581. 				#clock-cells = <1>;
  582. 			};
  583.  
  584. 			csis0: csis@fa600000 {
  585. 				compatible = "samsung,s5pv210-csis";
  586. 				reg = <0xfa600000 0x4000>;
  587. 				interrupt-parent = <&vic2>;
  588. 				interrupts = <29>;
  589. 				clocks = <&clocks CLK_CSIS>,
  590. 						<&clocks SCLK_CSIS>;
  591. 				clock-names = "clk_csis",
  592. 						"sclk_csis";
  593. 				bus-width = <4>;
  594. 				status = "disabled";
  595. 				#address-cells = <1>;
  596. 				#size-cells = <0>;
  597. 			};
  598.  
  599. 			fimc0: fimc@fb200000 {
  600. 				compatible = "samsung,s5pv210-fimc";
  601. 				reg = <0xfb200000 0x1000>;
  602. 				interrupts = <5>;
  603. 				interrupt-parent = <&vic2>;
  604. 				clocks = <&clocks CLK_FIMC0>,
  605. 						<&clocks SCLK_FIMC0>;
  606. 				clock-names = "fimc",
  607. 						"sclk_fimc";
  608. 				samsung,pix-limits = <4224 8192 1920 4224>;
  609. 				samsung,mainscaler-ext;
  610. 				samsung,cam-if;
  611. 			};
  612.  
  613. 			fimc1: fimc@fb300000 {
  614. 				compatible = "samsung,s5pv210-fimc";
  615. 				reg = <0xfb300000 0x1000>;
  616. 				interrupt-parent = <&vic2>;
  617. 				interrupts = <6>;
  618. 				clocks = <&clocks CLK_FIMC1>,
  619. 						<&clocks SCLK_FIMC1>;
  620. 				clock-names = "fimc",
  621. 						"sclk_fimc";
  622. 				samsung,pix-limits = <4224 8192 1920 4224>;
  623. 				samsung,mainscaler-ext;
  624. 				samsung,cam-if;
  625. 			};
  626.  
  627. 			fimc2: fimc@fb400000 {
  628. 				compatible = "samsung,s5pv210-fimc";
  629. 				reg = <0xfb400000 0x1000>;
  630. 				interrupt-parent = <&vic2>;
  631. 				interrupts = <7>;
  632. 				clocks = <&clocks CLK_FIMC2>,
  633. 						<&clocks SCLK_FIMC2>;
  634. 				clock-names = "fimc",
  635. 						"sclk_fimc";
  636. 				samsung,pix-limits = <4224 8192 1920 4224>;
  637. 				samsung,mainscaler-ext;
  638. 				samsung,lcd-wb;
  639. 			};
  640. 		};
  641. 	};
  642. };
  643.  
  644. #include "s5pv210-pinctrl.dtsi"

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