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ARM Trusted Firmware分析——启动、PSCI、OP-TEE接口_arm-trusted-firmware

arm-trusted-firmware

 关键词:等等。

 下图划分成不同EL,分别描述BL1、BL2、BL31、BL32、BL33启动流程,以及PSCI、SP处理流程。

1. 冷启动(Cold boot)流程及阶段划分

ATF冷启动实现分为5个步骤:

  • BL1 - AP Trusted ROM,一般为BootRom。
  • BL2 - Trusted Boot Firmware,一般为Trusted Bootloader。
  • BL31 - EL3 Runtime Firmware,一般为SML,管理SMC执行处理和中断,运行在secure monitor中。
  • BL32 - Secure-EL1 Payload,一般为TEE OS Image。
  • BL33 - Non-Trusted Firmware,一般为uboot、linux kernel。

ATF输出BL1、BL2、BL31,提供BL32和BL33接口。

启动流程如下:

1.1 BL1

BL1位于ROM中,在EL3下从reset vector处开始运行。

BL1做的工作主要有:

  • 决定启动路径:冷启动还是热启动。
  • 架构初始化:异常向量、CPU复位处理函数配置、控制寄存器设置(SCRLR_EL3/SCR_EL3/CPTR_EL3/DAIF)
  • 平台初始化:使能Trusted Watchdog、初始化控制台、配置硬件一致性互联、配置MMU、初始化相关存储设备。
  • 固件更新处理
  • BL2镜像加载和执行:
    • BL1输出“Booting Trusted Firmware"。
    • BL1加载BL2到SRAM;如果SRAM不够或者BL2镜像错误,输出“Failed to load BL2 firmware.”。
    • BL1切换到Secure EL1并将执行权交给BL2.

1.2 BL2

BL2位于SRAM中,运行在Secure EL1主要工作有:

  • 架构初始化:EL1/EL0使能浮点单元和ASMID。
  • 平台初始化:控制台初始化、相关存储设备初始化、MMU、相关设备安全配置、
  • SCP_BL2:系统控制核镜像加载,单独核处理系统功耗、时钟、复位等控制。
  • 加载BL31镜像:BL2将控制权交给BL1;BL1关闭MMU并关cache;BL1将控制权交给BL31。
  • 加载BL32镜像:BL32运行在安全世界,BL2依赖BL31将控制权交给BL32。SPSR通过Secure-EL1 Payload Dispatcher进行初始化。
  • 加载BL33镜像:BL2依赖BL31将控制权交给BL33。

1.3 BL31

BL31位于SRAM中,EL3模式。除了做架构初始化和平台初始化外,还做了如下工作:

  • PSCI服务初始化,后续提供CPU功耗管理操作。
  • BL32镜像运行初始化,处于Secure EL1模式。
  • 初始化非安全EL2或EL1,跳转到BL33执行。
  • 负责安全非安全世界切换。
  • 进行安全服务请求的分发。

2 BL1

BL1镜像的异常向量表初始化了两个:一个是入口bl1_entrypoint,EL1镜像正常执行流程;另一个是SMC调用接口,EL2执行结束会通过SMC返回执行BL31。

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vector_base bl1_vector_table
    b    bl1_entrypoint
    b    report_exception    /* Undef */
    b    bl1_aarch32_smc_handler    /* SMC call */
    b    report_exception    /* Prefetch abort */
    b    report_exception    /* Data abort */
    b    report_exception    /* Reserved */ b report_exception /* IRQ */ b report_exception /* FIQ */ 

func bl1_aarch32_smc_handler
/* ------------------------------------------------
* SMC in BL1 is handled assuming that the MMU is
* turned off by BL2.
* ------------------------------------------------
*/

/* ----------------------------------------------
 * Only RUN_IMAGE SMC is supported.
 * ----------------------------------------------
 */<span>
mov    r8, #BL1_SMC_RUN_IMAGE--------------------------<span style="color: rgba(255, 0, 0, 1)">仅支持BL1_SMC_RUN_IMAGE SMC调用;其他调用触发report_exception。</span>
cmp    r8, r0
blne    report_exception

/* ------------------------------------------------
 * Make sure only Secure world reaches here.
 * ------------------------------------------------
 */<span>
ldcopr  r8, SCR
tst    r8, #SCR_NS_BIT---------------------------------<span style="color: rgba(255, 0, 0, 1)">如果处于非安全状态,则触发report_exception。</span>
blne    report_exception

/* ---------------------------------------------------------------------
 * Pass control to next secure image.
 * Here it expects r1 to contain the address of a entry_point_info_t
 * structure describing the BL entrypoint.
 * ---------------------------------------------------------------------
 */<span>
mov    r8, r1------------------------------------------第一个参数r0是功能id,即BL1_SMC_RUN_IMAGE_SMC。第二个参数是entry_point_info_t变量。
mov    r0, r1
bl    bl1_print_next_bl_ep_info
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#if SPIN_ON_BL1_EXIT
bl print_debug_loop_message
debug_loop:
b debug_loop
#endif

mov    r0, r8
bl    bl1_plat_prepare_exit

stcopr    r0, TLBIALL
dsb    sy
isb

/*
 * Extract PC and SPSR based on struct `entry_point_info_t`
 * and load it in LR and SPSR registers respectively.
 */<span>
ldr    lr, [r8, #ENTRY_POINT_INFO_PC_OFFSET]
ldr    r1, [r8, #(ENTRY_POINT_INFO_PC_OFFSET + 4<span>)]
msr    spsr, r1

add    r8, r8, #ENTRY_POINT_INFO_ARGS_OFFSET
ldm    r8, {r0, r1, r2, r3}----------------------------执行跳转到BL31。
eret
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endfunc bl1_aarch32_smc_handler

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bl1_entrypoint()进行EL3执行环境初始化,设定向量表,加载bl2镜像并跳转到BL2执行。

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func bl1_entrypoint
    /* ---------------------------------------------------------------------
     * If the reset address is programmable then bl1_entrypoint() is
     * executed only on the cold boot path. Therefore, we can skip the warm
     * boot mailbox mechanism.
     * ---------------------------------------------------------------------
     */
    el3_entrypoint_common                    \
        _set_endian=1                    \----------------------是否设定大小端。
        _warm_boot_mailbox=!PROGRAMMABLE_RESET_ADDRESS    \-----是否检查当前属于冷启动还是热启动。
        _secondary_cold_boot=!COLD_BOOT_SINGLE_CPU    \---------确定当前CPU是主CPU还是从CPU。
        _init_memory=1 \---------------------是否初始化memory。 _init_c_runtime=1 \----------------------是否初始化C语言执行环境。 _exception_vectors=bl1_exceptions-----------------------异常向量表。 
/* ---------------------------------------------
 * Architectural init. can be generic e.g.
 * enabling stack alignment and platform spec-
 * ific e.g. MMU &amp; page table setup as per the
 * platform memory map. Perform the latter here
 * and the former in bl1_main.
 * ---------------------------------------------
 */<span>
bl    bl1_early_platform_setup-------------------初始化memory、page table,所需外围设备初始化等。
bl    bl1_plat_arch_setup

/* --------------------------------------------------
 * Initialize platform and jump to our c-entry point
 * for this type of reset.
 * --------------------------------------------------
 */<span>
bl    <a href="#bl1_main" rel="noopener">bl1_main</a>--------------------------------------------进行必要初始化,加载BL2镜像然后为退出EL3进入S.EL1做好准备。<br>    /* --------------------------------------------------
 * Do the transition to next boot image.
 * --------------------------------------------------
 */<span>
b    <a href="#el3_exit" rel="noopener">el3_exit</a>
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endfunc bl1_entrypoint

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el3_entrypoint_common()主要完成进入EL3基本设置和向量表注册。

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    .macro el3_entrypoint_common                    \
        _set_endian, _warm_boot_mailbox, _secondary_cold_boot,    \
        _init_memory, _init_c_runtime, _exception_vectors
.if<span> \_set_endian-------------------------------------------------------在进行内存读写之前,设置好系统的大小端。
    /* -------------------------------------------------------------
     * Set the CPU endianness before doing anything that might
     * involve memory reads or writes.
     * -------------------------------------------------------------
     */<span>
    mrs    x0, sctlr_el3
    bic    x0, x0, #SCTLR_EE_BIT
    msr    sctlr_el3, x0
    isb
.endif /* _set_endian */<span>

.if<span> \_warm_boot_mailbox------------------------------------------------根据当前平台的entrypoint判断是冷启动还是热启动。
    /* -------------------------------------------------------------
     * This code will be executed for both warm and cold resets.
     * Now is the time to distinguish between the two.
     * Query the platform entrypoint address and if it is not zero
     * then it means it is a warm boot so jump to this address.
     * -------------------------------------------------------------
     */<span>
    bl    plat_get_my_entrypoint
    cbz    x0, do_cold_boot--------------------------------------------如果为0说明是冷启动,执行do_cold_boot();非0则跳转到entrypoint执行。
    br    x0

do_cold_boot:
.endif /* _warm_boot_mailbox */

/* ---------------------------------------------------------------------
 * It is a cold boot.
 * Perform any processor specific actions upon reset e.g. cache, TLB
 * invalidations etc.
 * ---------------------------------------------------------------------
 */<span>
bl    reset_handler---------------------------------------------------执行reset_handler()。

el3_arch_init_common \_exception_vectors------------------------------初始化异常向量。

.if<span> \_secondary_cold_boot---------------------------------------------判断当前CPU是主CPU还是从CPU。
    /* -------------------------------------------------------------
     * Check if this is a primary or secondary CPU cold boot.
     * The primary CPU will set up the platform while the
     * secondaries are placed in a platform-specific state until the
     * primary CPU performs the necessary actions to bring them out
     * of that state and allows entry into the OS.
     * -------------------------------------------------------------
     */<span>
    bl    plat_is_my_cpu_primary
    cbnz    w0, do_primary_cold_boot

    /* This is a cold boot on a secondary CPU */<span>
    bl    plat_secondary_cold_boot_setup
    /* plat_secondary_cold_boot_setup() is not supposed to return */<span>
    bl    el3_panic

do_primary_cold_boot:
.endif /* _secondary_cold_boot */

/* ---------------------------------------------------------------------
 * Initialize memory now. Secondary CPU initialization won't get to this
 * point.
 * ---------------------------------------------------------------------
 */<span>

.if<span> \_init_memory----------------------------------------------------初始化内存。
    bl    platform_mem_init
.endif /* _init_memory */

/* ---------------------------------------------------------------------
 * Init C runtime environment:
 *   - Zero-initialise the NOBITS sections. There are 2 of them:
 *       - the .bss section;
 *       - the coherent memory section (if any).
 *   - Relocate the data section from ROM to RAM, if required.
 * ---------------------------------------------------------------------
 */<span>
.if<span> \_init_c_runtime-------------------------------------------------初始化C执行环境。
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#if IMAGE_BL31
/* -------------------------------------------------------------
* Invalidate the RW memory used by the BL31 image. This
* includes the data and NOBITS sections. This is done to
* safeguard against possible corruption of this memory by
* dirty cache lines in a system cache as a result of use by
* an earlier boot loader stage.
* -------------------------------------------------------------
/
adr x0, RW_START
adr x1, RW_END
sub x1, x1, x0
bl inv_dcache_range
#endif /
IMAGE_BL31 */

    ldr    x0, =<span>__BSS_START__
    ldr    x1, =<span>__BSS_SIZE__
    bl    zeromem16
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#if USE_COHERENT_MEM
ldr x0, =COHERENT_RAM_START
ldr x1, =COHERENT_RAM_UNALIGNED_SIZE
bl zeromem16
#endif

#if IMAGE_BL1
ldr x0, =DATA_RAM_START
ldr x1, =DATA_ROM_START
ldr x2, =DATA_SIZE
bl memcpy16
#endif
.endif /* _init_c_runtime */

/* ---------------------------------------------------------------------
 * Use SP_EL0 for the C runtime stack.
 * ---------------------------------------------------------------------
 */<span>
msr    spsel, #0

/* ---------------------------------------------------------------------
 * Allocate a stack whose memory will be marked as Normal-IS-WBWA when
 * the MMU is enabled. There is no risk of reading stale stack memory
 * after enabling the MMU as only the primary CPU is running at the
 * moment.
 * ---------------------------------------------------------------------
 */<span>
bl    plat_set_my_stack
.endm</span></span></span></span></span></span></span></span></span></span></span></span></span></span></span></span></span></span></span></span></span></span></span></span></span></span></span></span></span></pre>
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复制代码

bl1_main()完成架构和平台特有初始化操作,然后加载BL2镜像并跳转执行。

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/*******************************************************************************
 * Function to perform late architectural and platform specific initialization.
 * It also queries the platform to load and run next BL image. Only called
 * by the primary cpu after a cold boot.
 ******************************************************************************/
void bl1_main(void)
{
    unsigned int image_id;
/* Announce our arrival */<span>
NOTICE(FIRMWARE_WELCOME_STR);
NOTICE("BL1: %s\n"<span>, version_string);
NOTICE("BL1: %s\n"<span>, build_message);

INFO("BL1: RAM %p - %p\n", (void *<span>)BL1_RAM_BASE,
                (void *<span>)BL1_RAM_LIMIT);
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/* Perform remaining generic architectural setup from EL3 */
bl1_arch_setup();

#if TRUSTED_BOARD_BOOT
/* Initialize authentication module /
auth_mod_init();----------------------------------------------初始化安全模块和镜像解析模块。
#endif /
TRUSTED_BOARD_BOOT */

/* Perform platform setup in BL1. */<span>
bl1_platform_setup();

/* Get the image id of next image to load and run. */<span>
image_id =<span> bl1_plat_get_next_image_id();----------------------<span style="color: rgba(255, 0, 0, 1)">获取下一级启动镜像的ID。</span>

/*
 * We currently interpret any image id other than
 * BL2_IMAGE_ID as the start of firmware update.
 */
if (image_id ==<span> BL2_IMAGE_ID)
    <a href="#bl1_load_bl2" rel="noopener">bl1_load_bl2</a>();------------------------------------------<span style="color: rgba(255, 0, 0, 1)">将BL2镜像加载到TSRAM中。</span>
else<span>
    NOTICE("BL1-FWU: *******FWU Process Started*******\n"<span>);

<a href="#bl1_prepare_next_image" rel="noopener">bl1_prepare_next_image</a>(image_id);----------------------------<span style="color: rgba(255, 0, 0, 1)">获取image_id对应镜像描述信息,并为进入下一级镜像执行准备好上下文。</span>
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}

/*******************************************************************************

  • This function locates and loads the BL2 raw binary image in the trusted SRAM.

  • Called by the primary cpu after a cold boot.

  • TODO: Add support for alternative image load mechanism e.g using virtio/elf

  • loader etc.
    ******************************************************************************/
    void bl1_load_bl2(void)
    {
    image_desc_t *image_desc;
    image_info_t *image_info;
    entry_point_info_t *ep_info;
    meminfo_t *bl1_tzram_layout;
    meminfo_t *bl2_tzram_layout;
    int err;

    /* Get the image descriptor */
    image_desc = bl1_plat_get_image_desc(BL2_IMAGE_ID);
    assert(image_desc);

    /* Get the image info */
    image_info = &image_desc->image_info;

    /* Get the entry point info */
    ep_info = &image_desc->ep_info;

    /* Find out how much free trusted ram remains after BL1 load */
    bl1_tzram_layout = bl1_plat_sec_mem_layout();

    INFO(“BL1: Loading BL2\n”);

#if LOAD_IMAGE_V2
err = load_auth_image(BL2_IMAGE_ID, image_info);
#else
/* Load the BL2 image */
err = load_auth_image(bl1_tzram_layout,
BL2_IMAGE_ID,
image_info->image_base,
image_info,
ep_info);

#endif /* LOAD_IMAGE_V2 */

if<span> (err) {
    ERROR("Failed to load BL2 firmware.\n"<span>);
    plat_error_handler(err);
}

/*
 * Create a new layout of memory for BL2 as seen by BL1 i.e.
 * tell it the amount of total and free memory available.
 * This layout is created at the first free address visible
 * to BL2. BL2 will read the memory layout before using its
 * memory for other purposes.
 */
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#if LOAD_IMAGE_V2
bl2_tzram_layout = (meminfo_t *) bl1_tzram_layout->total_base;
#else
bl2_tzram_layout = (meminfo_t ) bl1_tzram_layout->free_base;
#endif /
LOAD_IMAGE_V2 */

bl1_init_bl2_mem_layout(bl1_tzram_layout, bl2_tzram_layout);

ep_info-&gt;args.arg1 =<span> (uintptr_t)bl2_tzram_layout;
NOTICE("BL1: Booting BL2\n"<span>);
VERBOSE("BL1: BL2 memory layout address = %p\n"<span>,
    (void *<span>) bl2_tzram_layout);
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}

/*******************************************************************************

  • This function prepares the context for Secure/Normal world images.
  • Normal world images are transitioned to EL2(if supported) else EL1.
    ******************************************************************************/
    void bl1_prepare_next_image(unsigned int image_id)
    {
    unsigned int security_state;
    image_desc_t *image_desc;
    entry_point_info_t *next_bl_ep;

#if CTX_INCLUDE_AARCH32_REGS
/*
* Ensure that the build flag to save AArch32 system registers in CPU
* context is not set for AArch64-only platforms.
*/
if (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL1_SHIFT)
& ID_AA64PFR0_ELX_MASK) == 0x1) {
ERROR("EL1 supports AArch64-only. Please set build flag "
“CTX_INCLUDE_AARCH32_REGS = 0”);
panic();
}
#endif

/* Get the image descriptor. */<span>
image_desc =<span> bl1_plat_get_image_desc(image_id);---------------<span style="color: rgba(255, 0, 0, 1)">获取镜像描述信息,包括入口地址、名字等等。</span>
assert(image_desc);

/* Get the entry point info. */<span>
next_bl_ep = &amp;image_desc-&gt;<span>ep_info;

/* Get the image security state. */<span>
security_state = GET_SECURITY_STATE(next_bl_ep-&gt;<span>h.attr);------<span style="color: rgba(255, 0, 0, 1)">镜像是属于安全还是非安全镜像。</span>

/* Setup the Secure/Non-Secure context if not done already. */
if (!<span>cm_get_context(security_state))
    cm_set_context(&amp;<span>bl1_cpu_context[security_state], security_state);

/* Prepare the SPSR for the next BL image. */
if (security_state ==<span> SECURE) {-------------------------------<span style="color: rgba(255, 0, 0, 1)">设置镜像运行的SPSR数据。</span>
    next_bl_ep-&gt;spsr =<span> SPSR_64(MODE_EL1, MODE_SP_ELX,
               DISABLE_ALL_EXCEPTIONS);
} else<span> {
    /* Use EL2 if supported else use EL1. */
    if (read_id_aa64pfr0_el1() &amp;<span>
        (ID_AA64PFR0_ELX_MASK &lt;&lt;<span> ID_AA64PFR0_EL2_SHIFT)) {
        next_bl_ep-&gt;spsr =<span> SPSR_64(MODE_EL2, MODE_SP_ELX,
            DISABLE_ALL_EXCEPTIONS);
    } else<span> {
        next_bl_ep-&gt;spsr =<span> SPSR_64(MODE_EL1, MODE_SP_ELX,
           DISABLE_ALL_EXCEPTIONS);
    }
}

/* Allow platform to make change */<span>
bl1_plat_set_ep_info(image_id, next_bl_ep);

/* Prepare the context for the next BL image. */<span>
cm_init_my_context(next_bl_ep);
cm_prepare_el3_exit(security_state);--------------------------<span style="color: rgba(255, 0, 0, 1)">为运行下一个镜像,EL3做好准备。</span>

/* Indicate that image is in execution state. */<span>
image_desc-&gt;state =<span> IMAGE_STATE_EXECUTED;

print_entry_point_info(next_bl_ep);---------------------------<span style="color: rgba(255, 0, 0, 1)">打印下一级进行相关信息。下面即将el3_exit,退出EL3进入新的进项运行。</span>
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}

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3 BL2

BL2的主要工作就是加载BL3x系列镜像,然后通过SMC进入BL1进而跳转到BL31运行。

bl2_entrypoint()是BL2的入口,前半部分主要进行一系列初始化工作,然后通过bl2_main()加载BL3x镜像到RAM中,最后通过SMC调用执行BL1中指定的smc handler将CPU执行权交给BL31。

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func bl2_entrypoint
    /*---------------------------------------------
     * Save from x1 the extents of the tzram
     * available to BL2 for future use.
     * x0 is not currently used.
     * ---------------------------------------------
     */
    mov    x20, x1
/* ---------------------------------------------
 * Set the exception vector to something sane.
 * ---------------------------------------------
 */<span>
adr    x0, early_exceptions
msr    vbar_el1, x0-------------------------------------<span style="color: rgba(255, 0, 0, 1)">设定异常向量。</span>
isb

/* ---------------------------------------------
 * Enable the SError interrupt now that the
 * exception vectors have been setup.
 * ---------------------------------------------
 */<span>
msr    daifclr, #DAIF_ABT_BIT

/* ---------------------------------------------
 * Enable the instruction cache, stack pointer
 * and data access alignment checks
 * ---------------------------------------------
 */<span>
mov    x1, #(SCTLR_I_BIT | SCTLR_A_BIT |<span> SCTLR_SA_BIT)
mrs    x0, sctlr_el1
orr    x0, x0, x1
msr    sctlr_el1, x0----------------------------------<span style="color: rgba(255, 0, 0, 1)">配置cache、内存对齐等属性。</span>
isb

/* ---------------------------------------------
 * Invalidate the RW memory used by the BL2
 * image. This includes the data and NOBITS
 * sections. This is done to safeguard against
 * possible corruption of this memory by dirty
 * cache lines in a system cache as a result of
 * use by an earlier boot loader stage.
 * ---------------------------------------------
 */<span>
adr    x0, __RW_START__
adr    x1, __RW_END__
sub    x1, x1, x0
bl    inv_dcache_range-------------------------------<span style="color: rgba(255, 0, 0, 1)">将BL2的__RW_START__和__RW_END__之间的内存刷回DDR中。</span>

/* ---------------------------------------------
 * Zero out NOBITS sections. There are 2 of them:
 *   - the .bss section;
 *   - the coherent memory section.
 * ---------------------------------------------
 */<span>
ldr    x0, =<span>__BSS_START__
ldr    x1, =<span>__BSS_SIZE__
bl    zeromem16--------------------------------------<span style="color: rgba(255, 0, 0, 1)">初始化__BSS_START__开始,大小为__BSS_SIZE__内存为0。</span>
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#if USE_COHERENT_MEM
ldr x0, =COHERENT_RAM_START
ldr x1, =COHERENT_RAM_UNALIGNED_SIZE
bl zeromem16
#endif

/* --------------------------------------------
 * Allocate a stack whose memory will be marked
 * as Normal-IS-WBWA when the MMU is enabled.
 * There is no risk of reading stale stack
 * memory after enabling the MMU as only the
 * primary cpu is running at the moment.
 * --------------------------------------------
 */<span>
bl    plat_set_my_stack

/* ---------------------------------------------
 * Perform early platform setup &amp; platform
 * specific early arch. setup e.g. mmu setup
 * ---------------------------------------------
 */<span>
mov    x0, x20
bl    bl2_early_platform_setup
bl    bl2_plat_arch_setup

/* ---------------------------------------------
 * Jump to main function.
 * ---------------------------------------------
 */<span>
bl    bl2_main------------------------------------<span style="color: rgba(255, 0, 0, 1)">跳转到BL2主函数执行,该函数加载BL3x镜像,并通过SMC调用BL1指定SMC函数将CPU执行权交给BL31。</span>

/* ---------------------------------------------
 * Should never reach this point.
 * ---------------------------------------------
 */<span>
no_ret    plat_panic_handler
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endfunc bl2_entrypoint

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bl2_main()主要加载BL3x镜像并验证,然后获取下一个要运行的镜像信息,通过SMC调用让BL1去启动。

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/*******************************************************************************
 * The only thing to do in BL2 is to load further images and pass control to
 * next BL. The memory occupied by BL2 will be reclaimed by BL3x stages. BL2
 * runs entirely in S-EL1.
 ******************************************************************************/
void bl2_main(void)
{
    entry_point_info_t *next_bl_ep_info;
NOTICE("BL2: %s\n"<span>, version_string);
NOTICE("BL2: %s\n"<span>, build_message);

/* Perform remaining generic architectural setup in S-EL1 */<span>
bl2_arch_setup();
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#if TRUSTED_BOARD_BOOT
/* Initialize authentication module /
auth_mod_init();
#endif /
TRUSTED_BOARD_BOOT */

/* Load the subsequent bootloader images. */<span>
next_bl_ep_info =<span><a href="#bl2_load_images" rel="noopener"> bl2_load_images</a>();
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#ifdef AARCH32
/*
* For AArch32 state BL1 and BL2 share the MMU setup.
* Given that BL2 does not map BL1 regions, MMU needs
* to be disabled in order to go back to BL1.
/
disable_mmu_icache_secure();
#endif /
AARCH32 */

/*
 * Run next BL image via an SMC to BL1. Information on how to pass
 * control to the BL32 (if present) and BL33 software images will
 * be passed to next BL image as an argument.
 */<span>
smc(BL1_SMC_RUN_IMAGE, (unsigned long)next_bl_ep_info, 0, 0, 0, 0, 0, 0<span>);----------<span style="color: rgba(255, 0, 0, 1)">发起SMC异常启动BL31镜像,交给BL1 <a href="#bl1_aarch32_smc_handler" rel="noopener"><span style="color: rgba(255, 0, 0, 1)">bl1_aarch32_smc_handler</span></a>处理。</span>
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}

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bl2_mem_params_descs定义了BL2需要加载镜像的信息,通过REGISTER_BL_IMAGE_DESCS()将其和bl_mem_params_desc_ptr关联,并获取需要加载镜像数目bl_mem_params_desc_num。

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#define REGISTER_BL_IMAGE_DESCS(_img_desc)                \
    bl_mem_params_node_t *bl_mem_params_desc_ptr = &_img_desc[0];    \
    unsigned int bl_mem_params_desc_num = ARRAY_SIZE(_img_desc);

static bl_mem_params_node_t bl2_mem_params_descs[] = {

#ifdef EL3_PAYLOAD_BASE

#else /* EL3_PAYLOAD_BASE */

/* Fill BL31 related information */<span>
{
    .image_id =<span> BL31_IMAGE_ID,

    SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
        VERSION_2, entry_point_info_t,
        SECURE | EXECUTABLE |<span> EP_FIRST_EXE),
    .ep_info.pc =<span> BL31_BASE,
    .ep_info.spsr =<span> SPSR_64(MODE_EL3, MODE_SP_ELX,
        DISABLE_ALL_EXCEPTIONS),
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#if DEBUG
.ep_info.args.arg1 = ARM_BL31_PLAT_PARAM_VAL,
#endif

    SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
        VERSION_2, image_info_t, IMAGE_ATTRIB_PLAT_SETUP),
    .image_info.image_base =<span> BL31_BASE,
    .image_info.image_max_size = BL31_LIMIT -<span> BL31_BASE,
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ifdef BL32_BASE

    .next_handoff_image_id =<span> BL32_IMAGE_ID,
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else

    .next_handoff_image_id =<span> BL33_IMAGE_ID,
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endif

},
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ifdef BL32_BASE

/* Fill BL32 related information */<span>
{
    .image_id =<span> BL32_IMAGE_ID,

    SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
        VERSION_2, entry_point_info_t, SECURE |<span> EXECUTABLE),
    .ep_info.pc =<span> BL32_BASE,

    SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
        VERSION_2, image_info_t, 0<span>),
    .image_info.image_base =<span> BL32_BASE,
    .image_info.image_max_size = BL32_LIMIT -<span> BL32_BASE,

    .next_handoff_image_id =<span> BL33_IMAGE_ID,
},
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endif /* BL32_BASE */

/* Fill BL33 related information */<span>
{
    .image_id =<span> BL33_IMAGE_ID,
    SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,
        VERSION_2, entry_point_info_t, NON_SECURE |<span> EXECUTABLE),
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ifdef PRELOADED_BL33_BASE

    .ep_info.pc =<span> PRELOADED_BL33_BASE,

    SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
        VERSION_2, image_info_t, IMAGE_ATTRIB_SKIP_LOADING),
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else

    .ep_info.pc =<span> PLAT_ARM_NS_IMAGE_OFFSET,

    SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
        VERSION_2, image_info_t, 0<span>),
    .image_info.image_base =<span> PLAT_ARM_NS_IMAGE_OFFSET,
    .image_info.image_max_size =<span> ARM_DRAM1_SIZE,
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endif /* PRELOADED_BL33_BASE */

    .next_handoff_image_id =<span> INVALID_IMAGE_ID,
}
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#endif /* EL3_PAYLOAD_BASE */
};

REGISTER_BL_IMAGE_DESCS(bl2_mem_params_descs)

/*******************************************************************************

  • This function loads SCP_BL2/BL3x images and returns the ep_info for

  • the next executable image.
    ******************************************************************************/
    entry_point_info_t *bl2_load_images(void)
    {
    bl_params_t *bl2_to_next_bl_params;
    bl_load_info_t *bl2_load_info;
    const bl_load_info_node_t *bl2_node_info;
    int plat_setup_done = 0;
    int err;

    /*

    • Get information about the images to load.
      */
      bl2_load_info = plat_get_bl_image_load_info();-----------------获取待加载镜像BL3x或SCP_EL2信息,然后遍历处理。
      assert(bl2_load_info);
      assert(bl2_load_info->head);
      assert(bl2_load_info->h.type == PARAM_BL_LOAD_INFO);
      assert(bl2_load_info->h.version >= VERSION_2);
      bl2_node_info = bl2_load_info->head;---------------------------bl2_node_info指向镜像第一个对象。

    while (bl2_node_info) {----------------------------------------循环遍历bl2_mem_params_descs成员并加载处理。
    /*
    * Perform platform setup before loading the image,
    * if indicated in the image attributes AND if NOT
    * already done before.
    */
    if (bl2_node_info->image_info->h.attr & IMAGE_ATTRIB_PLAT_SETUP) {----确定加载前是否需要进行特定平台初始化。
    if (plat_setup_done) {
    WARN(“BL2: Platform setup already done!!\n”);
    } else {
    INFO(“BL2: Doing platform setup\n”);
    bl2_platform_setup();
    plat_setup_done = 1;
    }
    }

     if (!(bl2_node_info-&gt;image_info-&gt;h.attr &amp;<span> IMAGE_ATTRIB_SKIP_LOADING)) {----<span style="color: rgba(255, 0, 0, 1)">确定是否需要跳过加载到RAM步骤;如否,则进行验证并加载。</span>
         INFO("BL2: Loading image id %d\n", bl2_node_info-&gt;<span>image_id);
         err = load_auth_image(bl2_node_info-&gt;<span>image_id,
             bl2_node_info-&gt;<span>image_info);----------------------------------------<span style="color: rgba(255, 0, 0, 1)">将镜像加载到RAM,然后进行验证。</span>
         if<span> (err) {
             ERROR("BL2: Failed to load image (%i)\n"<span>, err);
             plat_error_handler(err);
         }
     } else<span> {
         INFO("BL2: Skip loading image id %d\n", bl2_node_info-&gt;<span>image_id);
     }
    
     /* Allow platform to handle image information. */<span>
     err = bl2_plat_handle_post_image_load(bl2_node_info-&gt;<span>image_id);-------------<span style="color: rgba(255, 0, 0, 1)">修改特定镜像的加载信息。</span>
     if<span> (err) {
         ERROR("BL2: Failure in post image load handling (%i)\n"<span>, err);
         plat_error_handler(err);
     }
    
     /* Go to next image */<span>
     bl2_node_info = bl2_node_info-&gt;<span>next_load_info;------------------------------<span style="color: rgba(255, 0, 0, 1)">循环加载下一个镜像。</span>
    
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    }

    /*

    • Get information to pass to the next image.
      */
      bl2_to_next_bl_params = plat_get_next_bl_params();------------------------------获取下一个执行镜像入口信息,属性为EXECUTABLE和EP_FIRST_EXE,也即BL31。
      assert(bl2_to_next_bl_params);
      assert(bl2_to_next_bl_params->head);
      assert(bl2_to_next_bl_params->h.type == PARAM_BL_PARAMS);
      assert(bl2_to_next_bl_params->h.version >= VERSION_2);

    /* Flush the parameters to be passed to next image */
    plat_flush_next_bl_params();----------------------------------------------------将bl_mem_params_desc_ptr数据刷到DDR中,后面即将通过SMC跳转到BL1启动BL31,保持数据一致性。

    return bl2_to_next_bl_params->head->ep_info;
    }

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4. BL31(EL3 Firmware)

参考文档:《SMC CALLING CONVENTION System Software on ARM® Platforms

SMCCC定义了每个SMC请求功能的ID以及入参和返回值。

下面逐一介绍运行在EL3固件的运行服务框架的注册、初始化和使用。

SMCCC定义了每个运行服务框架的SMC功能ID、OEN(Owning Entity Numbers)、Fast和Standard调用、SMC32和SMC64调用转换。

需要优先实现的功能有:

  • Standard服务调用:
  • Secure-EL1 Payload Dispatcher service:如果存在TOS或者S.EL1 Payload,则需要EL3 Secure Monitor负责切换NS.EL1/2和S.EL1。Secure Monitor和S.EL1 Payload之间接口被称为SPD(S.EL1 Payload Dispatcher)。ATF还提供了TSP(Test S.EL1 Payload)和TSPD。
  • CPU特有服务:提供CPU特有的的功能服务。

4.1 运行服务注册

DECLARE_RT_SVC()用于注册一个运行服务,指定服务名称、OEN范围、服务类型(SMC_TYPE_FAST/SMC_TYPE_STD)、初始化和调用函数。

通过DECLARE_RT_SVC()注册的每个服务都会在ELF的rt_svc_descs段中存在,__RT_SVC_DESCS_START__和__RT_SVC_DESCS_END__是此段的起始结束地址,并可以通过地址范围计算服务数量RT_SVC_DECS_NUM。

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/*
 * Convenience macro to declare a service descriptor
 */
#define DECLARE_RT_SVC(_name, _start, _end, _type, _setup, _smch) \
    static const rt_svc_desc_t __svc_desc_ ## _name \
        __section("rt_svc_descs") __used = { \
            .start_oen = _start, \
            .end_oen = _end, \
            .call_type = _type, \
            .name = #_name, \
            .init = _setup, \
            .handle = _smch }

typedef struct rt_svc_desc {
uint8_t start_oen;-------------------service内部启动oen
uint8_t end_oen;---------------------service内部末尾oen
uint8_t call_type;-------------------smc类型,是fast call还是standard call
const char *name;--------------------service名称
rt_svc_init_t init;------------------service初始化函数
rt_svc_handle_t handle;--------------对应function id的调用函数
} rt_svc_desc_t;

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SMC功能ID范围定义如下:

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/*******************************************************************************
 * Owning entity number definitions inside the function id as per the SMC
 * calling convention
 ******************************************************************************/
#define OEN_ARM_START            0
#define OEN_ARM_END            0
#define OEN_CPU_START            1
#define OEN_CPU_END            1
#define OEN_SIP_START            2
#define OEN_SIP_END            2
#define OEN_OEM_START            3
#define OEN_OEM_END            3
#define OEN_STD_START            4    /* Standard Calls */
#define OEN_STD_END            4
#define OEN_TAP_START            48    /* Trusted Applications */
#define OEN_TAP_END            49
#define OEN_TOS_START            50    /* Trusted OS */
#define OEN_TOS_END            63
#define OEN_LIMIT            64
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上面的定义根据如下规格:

MAX_RT_SVCS为128,是因为OEN有64个,SMC类型有Standard和Fast两种类型,所以一共有128种。rt_svc_descs_indices[]一共有128个。

4.2 ATF初始化

bl31_entrypoint()是冷启动的入口,只会被cpu0执行。

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func bl31_entrypoint
#if !RESET_TO_BL31
    /* ---------------------------------------------------------------
     * Preceding bootloader has populated x0 with a pointer to a
     * 'bl31_params' structure & x1 with a pointer to platform
     * specific structure
     * ---------------------------------------------------------------
     */
#if HISILICON
    /* hisilicon use args from uboot,
     * load_fip.c has set value in address 8 and 16
     */
    mov    x0, 8
    mov    x1, 16
    ldr    x20, [x0]
    ldr    x21, [x1]
#else
    mov    x20, x0
    mov    x21, x1
#endif
    /* ---------------------------------------------------------------------
     * For !RESET_TO_BL31 systems, only the primary CPU ever reaches
     * bl31_entrypoint() during the cold boot flow, so the cold/warm boot
     * and primary/secondary CPU logic should not be executed in this case.
     *
     * Also, assume that the previous bootloader has already set up the CPU
     * endianness and has initialised the memory.
     * ---------------------------------------------------------------------
     */
    el3_entrypoint_common                    \
        _set_endian=0                    \
        _warm_boot_mailbox=0                \
        _secondary_cold_boot=0                \
        _init_memory=0                    \
        _init_c_runtime=1                \
        _exception_vectors=runtime_exceptions----------------------------runtime_exceptions是ATF的异常向量表。
</span></span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> ---------------------------------------------------------------------
 * Relay the previous bootloader's arguments to the platform layer
 * ---------------------------------------------------------------------
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
mov    x0, x20
mov    x1, x21
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#else
/ ---------------------------------------------------------------------
* For RESET_TO_BL31 systems which have a programmable reset address,
* bl31_entrypoint() is executed only on the cold boot path so we can
* skip the warm boot mailbox mechanism.
* ---------------------------------------------------------------------
/
el3_entrypoint_common
_set_endian=1
_warm_boot_mailbox=!PROGRAMMABLE_RESET_ADDRESS
_secondary_cold_boot=!COLD_BOOT_SINGLE_CPU
_init_memory=1
_init_c_runtime=1
_exception_vectors=runtime_exceptions

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> ---------------------------------------------------------------------
 * For RESET_TO_BL31 systems, BL31 is the first bootloader to run so
 * there's no argument to relay from a previous bootloader. Zero the
 * arguments passed to the platform layer to reflect that.
 * ---------------------------------------------------------------------
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
mov    x0, </span><span style="color: rgba(128, 0, 128, 1)">0</span><span style="color: rgba(0, 0, 0, 1)">
mov    x1, </span><span style="color: rgba(128, 0, 128, 1)">0</span>
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#endif /* RESET_TO_BL31 */

<span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> ---------------------------------------------
 * Perform platform specific early arch. setup
 * ---------------------------------------------
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
bl    bl31_early_platform_setup-------------------------------------<span style="color: rgba(255, 0, 0, 1)">初始化UART,以及获取BL32、BL33的entrypoint。</span>
bl    bl31_plat_arch_setup------------------------------------------<span style="color: rgba(255, 0, 0, 1)">MMU内存初始化。

</span></span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> ---------------------------------------------
 * Jump to main function.
 * ---------------------------------------------
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
bl    <a href="#bl31_main" rel="noopener">bl31_main
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/ -------------------------------------------------------------
* Clean the .data & .bss sections to main memory. This ensures
* that any global data which was initialised by the primary CPU
* is visible to secondary CPUs before they enable their data
* caches and participate in coherency.
* -------------------------------------------------------------
/
adr x0, DATA_START
adr x1, DATA_END
sub x1, x1, x0
bl clean_dcache_range

adr    x0, __BSS_START__
adr    x1, __BSS_END__
sub    x1, x1, x0
bl    clean_dcache_range--------------------------------------------<span style="color: rgba(255, 0, 0, 1)">刷data和bss段到内存中。</span>

b    <a href="#el3_exit" rel="noopener">el3_exit</a>
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endfunc bl31_entrypoint

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BL3异常向量表runtime_exceptions

 el3_exit()退出当前ATF执行下一阶段的镜像。

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    /* -----------------------------------------------------
     * This routine assumes that the SP_EL3 is pointing to
     * a valid context structure from where the gp regs and
     * other special registers can be retrieved.
     * -----------------------------------------------------
     */
func el3_exit
    /* -----------------------------------------------------
     * Save the current SP_EL0 i.e. the EL3 runtime stack
     * which will be used for handling the next SMC. Then
     * switch to SP_EL3
     * -----------------------------------------------------
     */
    mov    x17, sp
    msr    spsel, #1
    str    x17, [sp, #CTX_EL3STATE_OFFSET + CTX_RUNTIME_SP]
</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> -----------------------------------------------------
 * Restore SPSR_EL3, ELR_EL3 and SCR_EL3 prior to ERET
 * -----------------------------------------------------
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
ldr    x18, [sp, #CTX_EL3STATE_OFFSET </span>+<span style="color: rgba(0, 0, 0, 1)"> CTX_SCR_EL3]
ldp    x16, x17, [sp, #CTX_EL3STATE_OFFSET </span>+<span style="color: rgba(0, 0, 0, 1)"> CTX_SPSR_EL3]
msr    scr_el3, x18
msr    spsr_el3, x16
msr    elr_el3, x17

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Restore saved general purpose registers and return </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
b    restore_gp_registers_eret
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endfunc el3_exit

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 bl31_main()是ATF主体,初始化好ATF服务、启动optee os,至此可以提供psci、TOS等服务。然后再为进入BL33做好准备工作。

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/*******************************************************************************
 * BL31 is responsible for setting up the runtime services for the primary cpu
 * before passing control to the bootloader or an Operating System. This
 * function calls runtime_svc_init() which initializes all registered runtime
 * services. The run time services would setup enough context for the core to
 * swtich to the next exception level. When this function returns, the core will
 * switch to the programmed exception level via. an ERET.
 ******************************************************************************/
void bl31_main(void)
{
    NOTICE("BL31: %s\n", version_string);
    NOTICE("BL31: %s\n", build_message);
</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Perform platform setup in BL31 </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
bl31_platform_setup();---------------------------------------------------<span style="color: rgba(255, 0, 0, 1)">初始化GIC、Timer、Power等工作。

</span></span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Initialise helper libraries </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
bl31_lib_init();---------------------------------------------------------<span style="color: rgba(255, 0, 0, 1)">初始化BL31中相关全局变量。

</span></span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Initialize the runtime services e.g. psci. </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
INFO(</span><span style="color: rgba(128, 0, 0, 1)">"</span><span style="color: rgba(128, 0, 0, 1)">BL31: Initializing runtime services\n</span><span style="color: rgba(128, 0, 0, 1)">"</span><span style="color: rgba(0, 0, 0, 1)">);
<a href="#runtime_svc_init" rel="noopener">runtime_svc_init</a>();------------------------------------------------------<span style="color: rgba(255, 0, 0, 1)">初始化EL3 ATF中注册的服务,编译时放在rt_svc_decs特定段中。

</span></span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
 * All the cold boot actions on the primary cpu are done. We now need to
 * decide which is the next image (BL32 or BL33) and how to execute it.
 * If the SPD runtime service is present, it would want to pass control
 * to BL32 first in S-EL1. In that case, SPD would have registered a
 * function to intialize bl32 where it takes responsibility of entering
 * S-EL1 and returning control back to bl31_main. Once this is done we
 * can prepare entry into BL33 as normal.
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span>

<span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
 * If SPD had registerd an init hook, invoke it.
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span>
<span style="color: rgba(0, 0, 255, 1)">if</span><span style="color: rgba(0, 0, 0, 1)"> (bl32_init) {
    INFO(</span><span style="color: rgba(128, 0, 0, 1)">"</span><span style="color: rgba(128, 0, 0, 1)">BL31: Initializing BL32\n</span><span style="color: rgba(128, 0, 0, 1)">"</span><span style="color: rgba(0, 0, 0, 1)">);
    (</span>*<span style="color: rgba(0, 0, 0, 1)">bl32_init)();------------------------------------------------------<span style="color: rgba(255, 0, 0, 1)">如果注册了TOS支持,调用对应的init函数初始化TOS。对于optee就是<a href="#opteed_init" rel="noopener">opteed_init</a>()。</span>
}
</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
 * We are ready to enter the next EL. Prepare entry into the image
 * corresponding to the desired security state after the next ERET.
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
bl31_prepare_next_image_entry();-----------------------------------------<span style="color: rgba(255, 0, 0, 1)">准备跳转到BL33,

</span></span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
 * Perform any platform specific runtime setup prior to cold boot exit
 * from BL31
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
bl31_plat_runtime_setup();-----------------------------------------------<span style="color: rgba(255, 0, 0, 1)">BL31退出前准备工作。</span>
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}

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runtime_svc_init()作为BL31初始化一部分,初始化了运行在主CPU上的运行服务框架。这必须在TOS和普通世界软件启动之前执行,因为安全和非安全软件可能需要使用这部分内容。

runtime_svc_init()主要对注册的服务进行有限性验证,调用各自服务的初始化函数init(),以及将不同SMC OEN转换到注册服务ID。

在实际使用中,注册一个服务可能对应一系列SMC调用。

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void runtime_svc_init(void)
{
    int rc = 0, index, start_idx, end_idx;
</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Assert the number of descriptors detected are less than maximum indices </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
assert((RT_SVC_DESCS_END </span>&gt;= RT_SVC_DESCS_START) &amp;&amp;<span style="color: rgba(0, 0, 0, 1)">
        (RT_SVC_DECS_NUM </span>&lt;<span style="color: rgba(0, 0, 0, 1)"> MAX_RT_SVCS));

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> If no runtime services are implemented then simply bail out </span><span style="color: rgba(0, 128, 0, 1)">*/</span>
<span style="color: rgba(0, 0, 255, 1)">if</span> (RT_SVC_DECS_NUM == <span style="color: rgba(128, 0, 128, 1)">0</span><span style="color: rgba(0, 0, 0, 1)">)-----------------------------------------------<span style="color: rgba(255, 0, 0, 1)">对注册到ATF的SMC服务数量进行检查。
    </span></span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)">;

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Initialise internal variables to invalid state </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
memset(rt_svc_descs_indices, </span>-<span style="color: rgba(128, 0, 128, 1)">1</span>, <span style="color: rgba(0, 0, 255, 1)">sizeof</span><span style="color: rgba(0, 0, 0, 1)">(rt_svc_descs_indices));

rt_svc_descs </span>= (rt_svc_desc_t *<span style="color: rgba(0, 0, 0, 1)">) RT_SVC_DESCS_START;
</span><span style="color: rgba(0, 0, 255, 1)">for</span> (index = <span style="color: rgba(128, 0, 128, 1)">0</span>; index &lt; RT_SVC_DECS_NUM; index++<span style="color: rgba(0, 0, 0, 1)">) {----------------------<span style="color: rgba(255, 0, 0, 1)">遍历rt_svc_descs段,</span>
    rt_svc_desc_t </span>*service = &amp;<span style="color: rgba(0, 0, 0, 1)">rt_svc_descs[index];
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rc = validate_rt_svc_desc(service);
if (rc) {
ERROR(“Invalid runtime service descriptor %p\n”,
(void *) service);
panic();
}

if (service->init) {
rc = service->init();--------------------------------------------执行当前service的init函数。
if (rc) {
ERROR(“Error initializing runtime service %s\n”,
service->name);
continue;
}
}

start_idx = get_unique_oen(rt_svc_descs[index].start_oen,
service->call_type);
assert(start_idx < MAX_RT_SVCS);
end_idx = get_unique_oen(rt_svc_descs[index].end_oen,
service->call_type);
assert(end_idx < MAX_RT_SVCS);
for (; start_idx <= end_idx; start_idx++)----------------------------根据call_type和oen范围,确定rt_svc_descs_indices对应下标,达到SMC function id到注册service id的转换。
rt_svc_descs_indices[start_idx] = index;
}
}

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4.3 处理SMC

当EL3 Firmware接收到一个SMC时,SMC功能ID通过W0传递到EL3 Firmware。这是根据寄存位宽和W0进行检查,如果两者不匹配则返回错误。

其中Bit[31]和bits[29:24]共7bit组成一个0~127范围数值,在rt_svc_descs_indices[]所对应具体的软件服务rt_svc_descs[]索引。

进而调用具体软件服务的handle()函数:

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uintptr_t handle_runtime_svc(uint32_t smc_fid,
                 void *cookie,
                 void *handle,
                 unsigned int flags)
{
    u_register_t x1, x2, x3, x4;
    int index, idx;
    const rt_svc_desc_t *rt_svc_descs;
assert(handle);
idx </span>=<span style="color: rgba(0, 0, 0, 1)"> get_unique_oen_from_smc_fid(smc_fid);
assert(idx </span>&gt;= <span style="color: rgba(128, 0, 128, 1)">0</span> &amp;&amp; idx &lt;<span style="color: rgba(0, 0, 0, 1)"> MAX_RT_SVCS);

index </span>=<span style="color: rgba(0, 0, 0, 1)"> rt_svc_descs_indices[idx];---------------------<span style="color: rgba(255, 0, 0, 1)">将从x0寄存器中读取的Standard/Fast和OWN组合的idx,找到Runtime Service的index。
</span></span><span style="color: rgba(0, 0, 255, 1)">if</span> (index &lt; <span style="color: rgba(128, 0, 128, 1)">0</span> || index &gt;=<span style="color: rgba(0, 0, 0, 1)"> RT_SVC_DECS_NUM)
    SMC_RET1(handle, SMC_UNK);

rt_svc_descs </span>= (rt_svc_desc_t *<span style="color: rgba(0, 0, 0, 1)">) RT_SVC_DESCS_START;---<span style="color: rgba(255, 0, 0, 1)">Runtime Service起始地址。</span>

get_smc_params_from_ctx(handle, x1, x2, x3, x4);-------<span style="color: rgba(255, 0, 0, 1)">获取x1/x2/x3/x4寄存器。

</span></span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> rt_svc_descs[index].handle(smc_fid, x1, x2, x3, x4, cookie,
                    handle, flags);--------------------<span style="color: rgba(255, 0, 0, 1)">调用具体Runtime Service的handle()函数。</span>
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}

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5. BL31 PSCI

参考文档:《POWER STATE COORDINATION INTERFACE (PSCI) System Software on ARM® Systems

PSCI功能作为Standard service一部分,由std_svc_smc_handler()处理。

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DECLARE_RT_SVC(
        std_svc,
    OEN_STD_START,
    OEN_STD_END,
    SMC_TYPE_FAST,
    std_svc_setup,
    <a href="#std_svc_smc_handler" rel="noopener">std_svc_smc_handler</a>-----------------------------<span style="color: rgba(255, 0, 0, 1)">对于Fast类型Standard服务调用,主要是进行PSCI处理。</span>
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);

uintptr_t std_svc_smc_handler(uint32_t smc_fid,
u_register_t x1,
u_register_t x2,
u_register_t x3,
u_register_t x4,
void cookie,
void handle,
u_register_t flags)
{
/

* Dispatch PSCI calls to PSCI SMC handler and return its return
* value
/
if (is_psci_fid(smc_fid)) {
uint64_t ret;

    ret </span>=<span style="color: rgba(0, 0, 0, 1)"><a href="#psci_smc_handler" rel="noopener"> psci_smc_handler</a>(smc_fid, x1, x2, x3, x4,
        cookie, handle, flags);---------------------<span style="color: rgba(255, 0, 0, 1)">首先判断是否是Fast类型,然后交给psci_smc_handler()进行处理。
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SMC_RET1(handle, ret);
}

}

u_register_t psci_smc_handler(uint32_t smc_fid,
u_register_t x1,
u_register_t x2,
u_register_t x3,
u_register_t x4,
void *cookie,
void *handle,
u_register_t flags)
{
if (is_caller_secure(flags))
return SMC_UNK;

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Check the fid against the capabilities </span><span style="color: rgba(0, 128, 0, 1)">*/</span>
<span style="color: rgba(0, 0, 255, 1)">if</span> (!(psci_caps &amp;<span style="color: rgba(0, 0, 0, 1)"> define_psci_cap(smc_fid)))
    </span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> SMC_UNK;

</span><span style="color: rgba(0, 0, 255, 1)">if</span> (((smc_fid &gt;&gt; FUNCID_CC_SHIFT) &amp; FUNCID_CC_MASK) ==<span style="color: rgba(0, 0, 0, 1)"> SMC_32) {
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} else {---------------------------------------------这里以64系统为例。
/ 64-bit PSCI function /

    <span style="color: rgba(0, 0, 255, 1)">switch</span><span style="color: rgba(0, 0, 0, 1)"> (smc_fid) {
    </span><span style="color: rgba(0, 0, 255, 1)">case</span><span style="color: rgba(0, 0, 0, 1)"> PSCI_CPU_SUSPEND_AARCH64:
        </span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> psci_cpu_suspend(x1, x2, x3);

    </span><span style="color: rgba(0, 0, 255, 1)">case</span><span style="color: rgba(0, 0, 0, 1)"> PSCI_CPU_ON_AARCH64:-----------------------<span style="color: rgba(255, 0, 0, 1)">PSCI_CPU_ON_AARCH64为0xc4000003,bit[31]=1:Fast Call、bit[30]=1:SMC64、bits[29:24]=000100:Starndard service、bits[15:0]=0000 0011:内部定义序号。
        </span></span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"><a href="#psci_cpu_on" rel="noopener"> psci_cpu_on</a>(x1, x2, x3);
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          case PSCI_AFFINITY_INFO_AARCH64:
              return psci_affinity_info(x1, x2);

          case PSCI_MIG_AARCH64:
          return psci_migrate(x1);

          case PSCI_MIG_INFO_UP_CPU_AARCH64:
              return psci_migrate_info_up_cpu();

          case PSCI_NODE_HW_STATE_AARCH64:
              return psci_node_hw_state(x1, x2);

          case PSCI_SYSTEM_SUSPEND_AARCH64:
              return psci_system_suspend(x1, x2);

  #if ENABLE_PSCI_STAT
          case PSCI_STAT_RESIDENCY_AARCH64:
              return psci_stat_residency(x1, x2);

          case PSCI_STAT_COUNT_AARCH64:
              return psci_stat_count(x1, x2);
  #endif

        default:
            break;
        }
    }
WARN(</span><span style="color: rgba(128, 0, 0, 1)">"</span><span style="color: rgba(128, 0, 0, 1)">Unimplemented PSCI Call: 0x%x \n</span><span style="color: rgba(128, 0, 0, 1)">"</span><span style="color: rgba(0, 0, 0, 1)">, smc_fid);
</span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> SMC_UNK;
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}

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5.1 PSCI_VERSION

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unsigned int psci_version(void)
{
    return PSCI_MAJOR_VER | PSCI_MINOR_VER;
}

#define PSCI_MAJOR_VER (1 << 16)
#define PSCI_MINOR_VER 0x0

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5.2 PSCI_CPU_SUSPEND

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int psci_cpu_suspend(unsigned int power_state,
             uintptr_t entrypoint,
             u_register_t context_id)
{
    int rc;
    unsigned int target_pwrlvl, is_power_down_state;
    entry_point_info_t ep;
    psci_power_state_t state_info = { {PSCI_LOCAL_STATE_RUN} };
    plat_local_state_t cpu_pd_state;
</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Validate the power_state parameter </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
rc </span>= psci_validate_power_state(power_state, &amp;<span style="color: rgba(0, 0, 0, 1)">state_info);
</span><span style="color: rgba(0, 0, 255, 1)">if</span> (rc !=<span style="color: rgba(0, 0, 0, 1)"> PSCI_E_SUCCESS) {
    assert(rc </span>==<span style="color: rgba(0, 0, 0, 1)"> PSCI_E_INVALID_PARAMS);
    </span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> rc;
}

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
 * Get the value of the state type bit from the power state parameter.
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
is_power_down_state </span>=<span style="color: rgba(0, 0, 0, 1)"> psci_get_pstate_type(power_state);

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Sanity check the requested suspend levels </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
assert(psci_validate_suspend_req(</span>&amp;<span style="color: rgba(0, 0, 0, 1)">state_info, is_power_down_state)
        </span>==<span style="color: rgba(0, 0, 0, 1)"> PSCI_E_SUCCESS);

target_pwrlvl </span>= psci_find_target_suspend_lvl(&amp;<span style="color: rgba(0, 0, 0, 1)">state_info);
</span><span style="color: rgba(0, 0, 255, 1)">if</span> (target_pwrlvl ==<span style="color: rgba(0, 0, 0, 1)"> PSCI_INVALID_PWR_LVL) {
    ERROR(</span><span style="color: rgba(128, 0, 0, 1)">"</span><span style="color: rgba(128, 0, 0, 1)">Invalid target power level for suspend operation\n</span><span style="color: rgba(128, 0, 0, 1)">"</span><span style="color: rgba(0, 0, 0, 1)">);
    panic();
}

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Fast path for CPU standby.</span><span style="color: rgba(0, 128, 0, 1)">*/</span>
<span style="color: rgba(0, 0, 255, 1)">if</span><span style="color: rgba(0, 0, 0, 1)"> (is_cpu_standby_req(is_power_down_state, target_pwrlvl)) {
    </span><span style="color: rgba(0, 0, 255, 1)">if</span>  (!psci_plat_pm_ops-&gt;<span style="color: rgba(0, 0, 0, 1)">cpu_standby)
        </span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> PSCI_E_INVALID_PARAMS;

    </span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
     * Set the state of the CPU power domain to the platform
     * specific retention state and enter the standby state.
     </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
    cpu_pd_state </span>=<span style="color: rgba(0, 0, 0, 1)"> state_info.pwr_domain_state[PSCI_CPU_PWR_LVL];
    psci_set_cpu_local_state(cpu_pd_state);
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#if ENABLE_PSCI_STAT
/
* Capture time-stamp before CPU standby
* No cache maintenance is needed as caches
* are ON through out the CPU standby operation.
/
PMF_CAPTURE_TIMESTAMP(psci_svc, PSCI_STAT_ID_ENTER_LOW_PWR,
PMF_NO_CACHE_MAINT);
#endif

#if ENABLE_RUNTIME_INSTRUMENTATION
PMF_CAPTURE_TIMESTAMP(rt_instr_svc,
RT_INSTR_ENTER_HW_LOW_PWR,
PMF_NO_CACHE_MAINT);
#endif

    psci_plat_pm_ops</span>-&gt;<span style="color: rgba(0, 0, 0, 1)">cpu_standby(cpu_pd_state);

    </span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Upon exit from standby, set the state back to RUN. </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
    psci_set_cpu_local_state(PSCI_LOCAL_STATE_RUN);
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#if ENABLE_RUNTIME_INSTRUMENTATION
PMF_CAPTURE_TIMESTAMP(rt_instr_svc,
RT_INSTR_EXIT_HW_LOW_PWR,
PMF_NO_CACHE_MAINT);
#endif

#if ENABLE_PSCI_STAT
/ Capture time-stamp after CPU standby /
PMF_CAPTURE_TIMESTAMP(psci_svc, PSCI_STAT_ID_EXIT_LOW_PWR,
PMF_NO_CACHE_MAINT);

    </span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Update PSCI stats </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
    psci_stats_update_pwr_up(PSCI_CPU_PWR_LVL, </span>&amp;<span style="color: rgba(0, 0, 0, 1)">state_info,
        PMF_NO_CACHE_MAINT);
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#endif

    <span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> PSCI_E_SUCCESS;
}

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
 * If a power down state has been requested, we need to verify entry
 * point and program entry information.
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span>
<span style="color: rgba(0, 0, 255, 1)">if</span><span style="color: rgba(0, 0, 0, 1)"> (is_power_down_state) {
    rc </span>= psci_validate_entry_point(&amp;<span style="color: rgba(0, 0, 0, 1)">ep, entrypoint, context_id);
    </span><span style="color: rgba(0, 0, 255, 1)">if</span> (rc !=<span style="color: rgba(0, 0, 0, 1)"> PSCI_E_SUCCESS)
        </span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> rc;
}

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
 * Do what is needed to enter the power down state. Upon success,
 * enter the final wfi which will power down this CPU. This function
 * might return if the power down was abandoned for any reason, e.g.
 * arrival of an interrupt
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
psci_cpu_suspend_start(</span>&amp;<span style="color: rgba(0, 0, 0, 1)">ep,
            target_pwrlvl,
            </span>&amp;<span style="color: rgba(0, 0, 0, 1)">state_info,
            is_power_down_state);

</span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> PSCI_E_SUCCESS;
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}

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5.3 PSCI_CPU_OFF

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int psci_cpu_off(void)
{
    int rc;
    unsigned int target_pwrlvl = PLAT_MAX_PWR_LVL;
</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
 * Do what is needed to power off this CPU and possible higher power
 * levels if it able to do so. Upon success, enter the final wfi
 * which will power down this CPU.
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
rc </span>=<span style="color: rgba(0, 0, 0, 1)"> psci_do_cpu_off(target_pwrlvl);

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
 * The only error cpu_off can return is E_DENIED. So check if that's
 * indeed the case.
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
assert(rc </span>==<span style="color: rgba(0, 0, 0, 1)"> PSCI_E_DENIED);

</span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> rc;
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}

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5.4 PSCI_CPU_ON

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/*******************************************************************************
 * PSCI frontend api for servicing SMCs. Described in the PSCI spec.
 ******************************************************************************/
int psci_cpu_on(u_register_t target_cpu,
        uintptr_t entrypoint,
        u_register_t context_id)

{
int rc;
entry_point_info_t ep;

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Determine if the cpu exists of not </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
rc </span>=<span style="color: rgba(0, 0, 0, 1)"> psci_validate_mpidr(target_cpu);
</span><span style="color: rgba(0, 0, 255, 1)">if</span> (rc !=<span style="color: rgba(0, 0, 0, 1)"> PSCI_E_SUCCESS)
    </span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> PSCI_E_INVALID_PARAMS;

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Validate the entry point and get the entry_point_info </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
rc </span>= psci_validate_entry_point(&amp;<span style="color: rgba(0, 0, 0, 1)">ep, entrypoint, context_id);
</span><span style="color: rgba(0, 0, 255, 1)">if</span> (rc !=<span style="color: rgba(0, 0, 0, 1)"> PSCI_E_SUCCESS)
    </span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> rc;

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
 * To turn this cpu on, specify which power
 * levels need to be turned on
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span>
<span style="color: rgba(0, 0, 255, 1)">return</span> psci_cpu_on_start(target_cpu, &amp;<span style="color: rgba(0, 0, 0, 1)">ep);
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}

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5.5 PSCI_AFFINITY_INFO

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int psci_affinity_info(u_register_t target_affinity,
               unsigned int lowest_affinity_level)
{
    unsigned int target_idx;
</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> We dont support level higher than PSCI_CPU_PWR_LVL </span><span style="color: rgba(0, 128, 0, 1)">*/</span>
<span style="color: rgba(0, 0, 255, 1)">if</span> (lowest_affinity_level &gt;<span style="color: rgba(0, 0, 0, 1)"> PSCI_CPU_PWR_LVL)
    </span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> PSCI_E_INVALID_PARAMS;

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Calculate the cpu index of the target </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
target_idx </span>=<span style="color: rgba(0, 0, 0, 1)"> plat_core_pos_by_mpidr(target_affinity);
</span><span style="color: rgba(0, 0, 255, 1)">if</span> (target_idx == -<span style="color: rgba(128, 0, 128, 1)">1</span><span style="color: rgba(0, 0, 0, 1)">)
    </span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> PSCI_E_INVALID_PARAMS;

</span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> psci_get_aff_info_state_by_idx(target_idx);
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}

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5.6 PSCI_MIG

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int psci_migrate(u_register_t target_cpu)
{
    int rc;
    u_register_t resident_cpu_mpidr;
rc </span>= psci_spd_migrate_info(&amp;<span style="color: rgba(0, 0, 0, 1)">resident_cpu_mpidr);
</span><span style="color: rgba(0, 0, 255, 1)">if</span> (rc !=<span style="color: rgba(0, 0, 0, 1)"> PSCI_TOS_UP_MIG_CAP)
    </span><span style="color: rgba(0, 0, 255, 1)">return</span> (rc == PSCI_TOS_NOT_UP_MIG_CAP) ?<span style="color: rgba(0, 0, 0, 1)">
          PSCI_E_DENIED : PSCI_E_NOT_SUPPORTED;

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
 * Migrate should only be invoked on the CPU where
 * the Secure OS is resident.
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span>
<span style="color: rgba(0, 0, 255, 1)">if</span> (resident_cpu_mpidr !=<span style="color: rgba(0, 0, 0, 1)"> read_mpidr_el1())
    </span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> PSCI_E_NOT_PRESENT;

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Check the validity of the specified target cpu </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
rc </span>=<span style="color: rgba(0, 0, 0, 1)"> psci_validate_mpidr(target_cpu);
</span><span style="color: rgba(0, 0, 255, 1)">if</span> (rc !=<span style="color: rgba(0, 0, 0, 1)"> PSCI_E_SUCCESS)
    </span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> PSCI_E_INVALID_PARAMS;

assert(psci_spd_pm </span>&amp;&amp; psci_spd_pm-&gt;<span style="color: rgba(0, 0, 0, 1)">svc_migrate);

rc </span>= psci_spd_pm-&gt;<span style="color: rgba(0, 0, 0, 1)">svc_migrate(read_mpidr_el1(), target_cpu);
assert(rc </span>== PSCI_E_SUCCESS || rc ==<span style="color: rgba(0, 0, 0, 1)"> PSCI_E_INTERN_FAIL);

</span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> rc;
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}

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5.7 PSCI_MIG_INFO_TYPE

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int psci_migrate_info_type(void)
{
    u_register_t resident_cpu_mpidr;
</span><span style="color: rgba(0, 0, 255, 1)">return</span> psci_spd_migrate_info(&amp;<span style="color: rgba(0, 0, 0, 1)">resident_cpu_mpidr);
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}

/*****************************************************************************

  • This function invokes the migrate info hook in the spd_pm_ops. It performs

  • the necessary return value validation. If the Secure Payload is UP and

  • migrate capable, it returns the mpidr of the CPU on which the Secure payload

  • is resident through the mpidr parameter. Else the value of the parameter on

  • return is undefined.
    ******************************************************************************/
    int psci_spd_migrate_info(u_register_t *mpidr)
    {
    int rc;

    if (!psci_spd_pm || !psci_spd_pm->svc_migrate_info)
    return PSCI_E_NOT_SUPPORTED;

    rc = psci_spd_pm->svc_migrate_info(mpidr);

    assert(rc == PSCI_TOS_UP_MIG_CAP || rc == PSCI_TOS_NOT_UP_MIG_CAP
    || rc == PSCI_TOS_NOT_PRESENT_MP || rc == PSCI_E_NOT_SUPPORTED);

    return rc;
    }

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5.8 PSCI_MIG_INFO_UP_CPU

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long psci_migrate_info_up_cpu(void)
{
    u_register_t resident_cpu_mpidr;
    int rc;
</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
 * Return value of this depends upon what
 * psci_spd_migrate_info() returns.
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
rc </span>= psci_spd_migrate_info(&amp;<span style="color: rgba(0, 0, 0, 1)">resident_cpu_mpidr);
</span><span style="color: rgba(0, 0, 255, 1)">if</span> (rc != PSCI_TOS_NOT_UP_MIG_CAP &amp;&amp; rc !=<span style="color: rgba(0, 0, 0, 1)"> PSCI_TOS_UP_MIG_CAP)
    </span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> PSCI_E_INVALID_PARAMS;

</span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> resident_cpu_mpidr;
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}

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5.9 PSCI_SYSTEM_OFF

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void psci_system_off(void)
{
    psci_print_power_domain_map();
assert(psci_plat_pm_ops</span>-&gt;<span style="color: rgba(0, 0, 0, 1)">system_off);

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Notify the Secure Payload Dispatcher </span><span style="color: rgba(0, 128, 0, 1)">*/</span>
<span style="color: rgba(0, 0, 255, 1)">if</span> (psci_spd_pm &amp;&amp; psci_spd_pm-&gt;<span style="color: rgba(0, 0, 0, 1)">svc_system_off) {
    psci_spd_pm</span>-&gt;<span style="color: rgba(0, 0, 0, 1)">svc_system_off();
}

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Call the platform specific hook </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
psci_plat_pm_ops</span>-&gt;<span style="color: rgba(0, 0, 0, 1)">system_off();

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> This function does not return. We should never get here </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
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}

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5.10 PSCI_SYSTEM_RESET

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void psci_system_reset(void)
{
    psci_print_power_domain_map();
assert(psci_plat_pm_ops</span>-&gt;<span style="color: rgba(0, 0, 0, 1)">system_reset);

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Notify the Secure Payload Dispatcher </span><span style="color: rgba(0, 128, 0, 1)">*/</span>
<span style="color: rgba(0, 0, 255, 1)">if</span> (psci_spd_pm &amp;&amp; psci_spd_pm-&gt;<span style="color: rgba(0, 0, 0, 1)">svc_system_reset) {
    psci_spd_pm</span>-&gt;<span style="color: rgba(0, 0, 0, 1)">svc_system_reset();
}

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Call the platform specific hook </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
psci_plat_pm_ops</span>-&gt;<span style="color: rgba(0, 0, 0, 1)">system_reset();

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> This function does not return. We should never get here </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
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}

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5.11 PSCI_FEATURES

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int psci_features(unsigned int psci_fid)
{
    unsigned int local_caps = psci_caps;
</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Check if it is a 64 bit function </span><span style="color: rgba(0, 128, 0, 1)">*/</span>
<span style="color: rgba(0, 0, 255, 1)">if</span> (((psci_fid &gt;&gt; FUNCID_CC_SHIFT) &amp; FUNCID_CC_MASK) ==<span style="color: rgba(0, 0, 0, 1)"> SMC_64)
    local_caps </span>&amp;=<span style="color: rgba(0, 0, 0, 1)"> PSCI_CAP_64BIT_MASK;

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Check for invalid fid </span><span style="color: rgba(0, 128, 0, 1)">*/</span>
<span style="color: rgba(0, 0, 255, 1)">if</span> (!(is_std_svc_call(psci_fid) &amp;&amp;<span style="color: rgba(0, 0, 0, 1)"> is_valid_fast_smc(psci_fid)
        </span>&amp;&amp;<span style="color: rgba(0, 0, 0, 1)"> is_psci_fid(psci_fid)))
    </span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> PSCI_E_NOT_SUPPORTED;


</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Check if the psci fid is supported or not </span><span style="color: rgba(0, 128, 0, 1)">*/</span>
<span style="color: rgba(0, 0, 255, 1)">if</span> (!(local_caps &amp;<span style="color: rgba(0, 0, 0, 1)"> define_psci_cap(psci_fid)))
    </span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> PSCI_E_NOT_SUPPORTED;

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Format the feature flags </span><span style="color: rgba(0, 128, 0, 1)">*/</span>
<span style="color: rgba(0, 0, 255, 1)">if</span> (psci_fid == PSCI_CPU_SUSPEND_AARCH32 ||<span style="color: rgba(0, 0, 0, 1)">
        psci_fid </span>==<span style="color: rgba(0, 0, 0, 1)"> PSCI_CPU_SUSPEND_AARCH64) {
    </span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
     * The trusted firmware does not support OS Initiated Mode.
     </span><span style="color: rgba(0, 128, 0, 1)">*/</span>
    <span style="color: rgba(0, 0, 255, 1)">return</span> (FF_PSTATE &lt;&lt; FF_PSTATE_SHIFT) |<span style="color: rgba(0, 0, 0, 1)">
        ((</span>!FF_SUPPORTS_OS_INIT_MODE) &lt;&lt;<span style="color: rgba(0, 0, 0, 1)"> FF_MODE_SUPPORT_SHIFT);
}

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Return 0 for all other fid's </span><span style="color: rgba(0, 128, 0, 1)">*/</span>
<span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> PSCI_E_SUCCESS;
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}

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5.12 PSCI_SYSTEM_SUSPEND

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int psci_system_suspend(uintptr_t entrypoint, u_register_t context_id)
{
    int rc;
    psci_power_state_t state_info;
    entry_point_info_t ep;
</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Check if the current CPU is the last ON CPU in the system </span><span style="color: rgba(0, 128, 0, 1)">*/</span>
<span style="color: rgba(0, 0, 255, 1)">if</span> (!<span style="color: rgba(0, 0, 0, 1)">psci_is_last_on_cpu())
    </span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> PSCI_E_DENIED;

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Validate the entry point and get the entry_point_info </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
rc </span>= psci_validate_entry_point(&amp;<span style="color: rgba(0, 0, 0, 1)">ep, entrypoint, context_id);
</span><span style="color: rgba(0, 0, 255, 1)">if</span> (rc !=<span style="color: rgba(0, 0, 0, 1)"> PSCI_E_SUCCESS)
    </span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> rc;

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Query the psci_power_state for system suspend </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
psci_query_sys_suspend_pwrstate(</span>&amp;<span style="color: rgba(0, 0, 0, 1)">state_info);

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Ensure that the psci_power_state makes sense </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
assert(psci_find_target_suspend_lvl(</span>&amp;state_info) ==<span style="color: rgba(0, 0, 0, 1)"> PLAT_MAX_PWR_LVL);
assert(psci_validate_suspend_req(</span>&amp;<span style="color: rgba(0, 0, 0, 1)">state_info, PSTATE_TYPE_POWERDOWN)
                    </span>==<span style="color: rgba(0, 0, 0, 1)"> PSCI_E_SUCCESS);
assert(is_local_state_off(state_info.pwr_domain_state[PLAT_MAX_PWR_LVL]));

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
 * Do what is needed to enter the system suspend state. This function
 * might return if the power down was abandoned for any reason, e.g.
 * arrival of an interrupt
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
psci_cpu_suspend_start(</span>&amp;<span style="color: rgba(0, 0, 0, 1)">ep,
            PLAT_MAX_PWR_LVL,
            </span>&amp;<span style="color: rgba(0, 0, 0, 1)">state_info,
            PSTATE_TYPE_POWERDOWN);

</span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> PSCI_E_SUCCESS;
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}

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6. BL31 OPTEE接口

optee注册了Fast和Standard两种调用类型,Fast类型需要使用opteed_setup()进行初始化。两种类型共用opteed_smc_handler()进行smc处理。

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/* Define an OPTEED runtime service descriptor for fast SMC calls */
DECLARE_RT_SVC(
    opteed_fast,
OEN_TOS_START,
OEN_TOS_END,
SMC_TYPE_FAST,
<a href="#opteed_setup" rel="noopener">opteed_setup</a>,
<a href="#opteed_smc_handler" rel="noopener">opteed_smc_handler</a>
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);

/ Define an OPTEED runtime service descriptor for standard SMC calls /
DECLARE_RT_SVC(
opteed_std,

OEN_TOS_START,
OEN_TOS_END,
SMC_TYPE_STD,
NULL,
opteed_smc_handler
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);

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6.1 optee启动

在ATF BL31启动过程中,runtime_svc_init()会调用opteed_setup()来完成optee的启动。

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/*******************************************************************************
 * OPTEE Dispatcher setup. The OPTEED finds out the OPTEE entrypoint and type
 * (aarch32/aarch64) if not already known and initialises the context for entry
 * into OPTEE for its initialization.
 ******************************************************************************/
int32_t opteed_setup(void)
{
    entry_point_info_t *optee_ep_info;
    uint32_t linear_id;
linear_id </span>=<span style="color: rgba(0, 0, 0, 1)"> plat_my_core_pos();
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optee_ep_info = bl31_plat_get_next_image_ep_info(SECURE);-----------------获取BL32即optee os镜像信息。
if (!optee_ep_info) {
WARN(“No OPTEE provided by BL2 boot loader, Booting device”
“ without OPTEE initialization. SMC`s destined for OPTEE”
“ will return SMC_UNK\n”);
return 1;
}

if (!optee_ep_info->pc)
return 1;

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
 * We could inspect the SP image and determine it's execution
 * state i.e whether AArch32 or AArch64. Assuming it's AArch32
 * for the time being.
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
opteed_rw </span>=<span style="color: rgba(0, 0, 0, 1)"> OPTEE_AARCH64;
opteed_init_optee_ep_state(optee_ep_info,
            opteed_rw,
            optee_ep_info</span>-&gt;<span style="color: rgba(0, 0, 0, 1)">pc,
            </span>&amp;<span style="color: rgba(0, 0, 0, 1)">opteed_sp_context[linear_id]);------------------------------<span style="color: rgba(255, 0, 0, 1)">初始化安全CPU的smc上下文,存放于opteed_sp_context[]中。

</span></span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
 * All OPTEED initialization done. Now register our init function with
 * BL31 for deferred invocation
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
bl31_register_bl32_init(</span>&amp;<span style="color: rgba(0, 0, 0, 1)"><a href="#opteed_init" rel="noopener">opteed_init</a>);-----------------------------------<span style="color: rgba(255, 0, 0, 1)">bl32_init指向opteed_init(),在<a href="#bl31_main" rel="noopener"><span style="color: rgba(255, 0, 0, 1)">bl31_main</span></a>()中被调用。

</span></span><span style="color: rgba(0, 0, 255, 1)">return</span> <span style="color: rgba(128, 0, 128, 1)">0</span><span style="color: rgba(0, 0, 0, 1)">;
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}

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opteed_init()从镜像中获取optee os的入口点,并初始化好ATF和optee切换的上下文,然后进入optee并等待返回结果。

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/*******************************************************************************
 * This function passes control to the OPTEE image (BL32) for the first time
 * on the primary cpu after a cold boot. It assumes that a valid secure
 * context has already been created by opteed_setup() which can be directly
 * used.  It also assumes that a valid non-secure context has been
 * initialised by PSCI so it does not need to save and restore any
 * non-secure state. This function performs a synchronous entry into
 * OPTEE. OPTEE passes control back to this routine through a SMC.
 ******************************************************************************/
static int32_t opteed_init(void)
{
    uint32_t linear_id = plat_my_core_pos();
    optee_context_t *optee_ctx = &opteed_sp_context[linear_id];
    entry_point_info_t *optee_entry_point;
    uint64_t rc;
</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
 * Get information about the OPTEE (BL32) image. Its
 * absence is a critical failure.
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
optee_entry_point </span>=<span style="color: rgba(0, 0, 0, 1)"> bl31_plat_get_next_image_ep_info(SECURE);-----------------------------<span style="color: rgba(255, 0, 0, 1)">获取optee os镜像信息。</span>
assert(optee_entry_point);

cm_init_my_context(optee_entry_point);----------------------------------------------------<span style="color: rgba(255, 0, 0, 1)">设置当前CPU进入安全状态的上下文。

</span></span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
 * Arrange for an entry into OPTEE. It will be returned via
 * OPTEE_ENTRY_DONE case
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
rc </span>=<span style="color: rgba(0, 0, 0, 1)"><a href="#opteed_synchronous_sp_entry" rel="noopener"> opteed_synchronous_sp_entry</a>(optee_ctx);----------------------------------------------<span style="color: rgba(255, 0, 0, 1)">启动optee os,并等待OPTEE_ENTRY_DONE返回结果。</span>
assert(rc </span>!= <span style="color: rgba(128, 0, 128, 1)">0</span><span style="color: rgba(0, 0, 0, 1)">);

</span><span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> rc;
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}

/*****************************************************************************

  • This function takes an OPTEE context pointer and:
    1. Applies the S-EL1 system register context from optee_ctx->cpu_ctx.
    1. Saves the current C runtime state (callee saved registers) on the stack
  • frame and saves a reference to this state.
    1. Calls el3_exit() so that the EL3 system and general purpose registers
  • from the optee_ctx->cpu_ctx are used to enter the OPTEE image.
    *****************************************************************************/
    uint64_t opteed_synchronous_sp_entry(optee_context_t optee_ctx)
    {
    uint64_t rc;
assert(optee_ctx </span>!=<span style="color: rgba(0, 0, 0, 1)"> NULL);
assert(optee_ctx</span>-&gt;c_rt_ctx == <span style="color: rgba(128, 0, 128, 1)">0</span><span style="color: rgba(0, 0, 0, 1)">);

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Apply the Secure EL1 system register context and switch to it </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
assert(cm_get_context(SECURE) </span>== &amp;optee_ctx-&gt;<span style="color: rgba(0, 0, 0, 1)">cpu_ctx);
cm_el1_sysregs_context_restore(SECURE);---------------<span style="color: rgba(255, 0, 0, 1)">从optee_ctx-&gt;cpu_ctx中恢复S.EL1相关寄存器。</span>
cm_set_next_eret_context(SECURE);---------------------<span style="color: rgba(255, 0, 0, 1)">保存从S.EL1返回需要的上下文。</span>

rc </span>= <a href="#opteed_enter_sp" rel="noopener">opteed_enter_sp</a>(&amp;optee_ctx-&gt;<span style="color: rgba(0, 0, 0, 1)">c_rt_ctx);-----------<span style="color: rgba(255, 0, 0, 1)">将安全CPU保存的状态恢复到optee_ctx-&gt;c_rt_ctx中,并跳转到opteed os执行。
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#if DEBUG
optee_ctx->c_rt_ctx = 0;
#endif

<span style="color: rgba(0, 0, 255, 1)">return</span><span style="color: rgba(0, 0, 0, 1)"> rc;
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}

func opteed_enter_sp
/ Make space for the registers that we’re going to save /
mov x3, sp
str x3, [x0, #0]
sub sp, sp, #OPTEED_C_RT_CTX_SIZE

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Save callee-saved registers on to the stack </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
stp    x19, x20, [sp, #OPTEED_C_RT_CTX_X19]
stp    x21, x22, [sp, #OPTEED_C_RT_CTX_X21]
stp    x23, x24, [sp, #OPTEED_C_RT_CTX_X23]
stp    x25, x26, [sp, #OPTEED_C_RT_CTX_X25]
stp    x27, x28, [sp, #OPTEED_C_RT_CTX_X27]
stp    x29, x30, [sp, #OPTEED_C_RT_CTX_X29]

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> ---------------------------------------------
 * Everything is setup now. el3_exit() will
 * use the secure context to restore to the
 * general purpose and EL3 system registers to
 * ERET into OPTEE.
 * ---------------------------------------------
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
b    <a href="#el3_exit" rel="noopener">el3_exit</a>--------------------------------------------------<span style="color: rgba(255, 0, 0, 1)">使用配置好的安全上下文,退出EL3进入OPTEE。</span>
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endfunc opteed_enter_sp

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6.2 optee的SPD

 BL31中处理OP-TEE安全请求分发入口函数是opteed_smc_handler()。

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uint64_t opteed_smc_handler(uint32_t smc_fid,
             uint64_t x1,
             uint64_t x2,
             uint64_t x3,
             uint64_t x4,
             void *cookie,
             void *handle,
             uint64_t flags)
{
    cpu_context_t *ns_cpu_context;
    uint32_t linear_id = plat_my_core_pos();
    optee_context_t *optee_ctx = &opteed_sp_context[linear_id];---------------获取当前CPU保存的optee上下文。
    uint64_t rc;
</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
 * Determine which security state this SMC originated from
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span>

<span style="color: rgba(0, 0, 255, 1)">if</span><span style="color: rgba(0, 0, 0, 1)"> (is_caller_non_secure(flags)) {
    </span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
     * This is a fresh request from the non-secure client.
     * The parameters are in x1 and x2. Figure out which
     * registers need to be preserved, save the non-secure
     * state and send the request to the secure payload.
     </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
    assert(handle </span>==<span style="color: rgba(0, 0, 0, 1)"> cm_get_context(NON_SECURE));

    cm_el1_sysregs_context_save(NON_SECURE);

    </span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
     * We are done stashing the non-secure context. Ask the
     * OPTEE to do the work now.
     </span><span style="color: rgba(0, 128, 0, 1)">*/</span>

    <span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
     * Verify if there is a valid context to use, copy the
     * operation type and parameters to the secure context
     * and jump to the fast smc entry point in the secure
     * payload. Entry into S-EL1 will take place upon exit
     * from this function.
     </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
    assert(</span>&amp;optee_ctx-&gt;cpu_ctx ==<span style="color: rgba(0, 0, 0, 1)"> cm_get_context(SECURE));

    </span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Set appropriate entry for SMC.
     * We expect OPTEE to manage the PSTATE.I and PSTATE.F
     * flags as appropriate.
     </span><span style="color: rgba(0, 128, 0, 1)">*/</span>
    <span style="color: rgba(0, 0, 255, 1)">if</span> (GET_SMC_TYPE(smc_fid) ==<span style="color: rgba(0, 0, 0, 1)"> SMC_TYPE_FAST) {
        cm_set_elr_el3(SECURE, (uint64_t)
                </span>&amp;optee_vectors-&gt;<span style="color: rgba(0, 0, 0, 1)">fast_smc_entry);
    } </span><span style="color: rgba(0, 0, 255, 1)">else</span><span style="color: rgba(0, 0, 0, 1)"> {
        cm_set_elr_el3(SECURE, (uint64_t)
                </span>&amp;optee_vectors-&gt;<span style="color: rgba(0, 0, 0, 1)">std_smc_entry);
    }

    cm_el1_sysregs_context_restore(SECURE);
    cm_set_next_eret_context(SECURE);

    write_ctx_reg(get_gpregs_ctx(</span>&amp;optee_ctx-&gt;<span style="color: rgba(0, 0, 0, 1)">cpu_ctx),
              CTX_GPREG_X4,
              read_ctx_reg(get_gpregs_ctx(handle),
                   CTX_GPREG_X4));
    write_ctx_reg(get_gpregs_ctx(</span>&amp;optee_ctx-&gt;<span style="color: rgba(0, 0, 0, 1)">cpu_ctx),
              CTX_GPREG_X5,
              read_ctx_reg(get_gpregs_ctx(handle),
                   CTX_GPREG_X5));
    write_ctx_reg(get_gpregs_ctx(</span>&amp;optee_ctx-&gt;<span style="color: rgba(0, 0, 0, 1)">cpu_ctx),
              CTX_GPREG_X6,
              read_ctx_reg(get_gpregs_ctx(handle),
                   CTX_GPREG_X6));
    </span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Propagate hypervisor client ID </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
    write_ctx_reg(get_gpregs_ctx(</span>&amp;optee_ctx-&gt;<span style="color: rgba(0, 0, 0, 1)">cpu_ctx),
              CTX_GPREG_X7,
              read_ctx_reg(get_gpregs_ctx(handle),
                   CTX_GPREG_X7));

    SMC_RET4(</span>&amp;optee_ctx-&gt;<span style="color: rgba(0, 0, 0, 1)">cpu_ctx, smc_fid, x1, x2, x3);
}

</span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)">
 * Returning from OPTEE
 </span><span style="color: rgba(0, 128, 0, 1)">*/</span>

<span style="color: rgba(0, 0, 255, 1)">switch</span><span style="color: rgba(0, 0, 0, 1)"> (smc_fid) {
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case TEESMC_OPTEED_RETURN_ENTRY_DONE:-------------------------------------optee冷启动初始化完成后返回。
assert(optee_vectors == NULL);
optee_vectors = (optee_vectors_t *) x1;

    </span><span style="color: rgba(0, 0, 255, 1)">if</span><span style="color: rgba(0, 0, 0, 1)"> (optee_vectors) {
        set_optee_pstate(optee_ctx</span>-&gt;<span style="color: rgba(0, 0, 0, 1)">state, OPTEE_PSTATE_ON);
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psci_register_spd_pm_hook(&opteed_pm);

flags = 0;
set_interrupt_rm_flag(flags, NON_SECURE);
rc = register_interrupt_type_handler(INTR_TYPE_S_EL1,
opteed_sel1_interrupt_handler,
flags);
if (rc)
panic();
}
opteed_synchronous_sp_exit
(optee_ctx, x1);-----------------------------从optee中返回。

case TEESMC_OPTEED_RETURN_ON_DONE:-----------------------------------------表示optee由cpu_on导致的启动完成,0标识成功,其他失败。
case TEESMC_OPTEED_RETURN_RESUME_DONE:-------------------------------------表示optee从cpu_suspend导致的休眠中唤醒完成;0表示成功,其他失败。
case TEESMC_OPTEED_RETURN_OFF_DONE:----------------------------------------下面分表表示optee对cpu_off/cpu_suspend/system_off/system_reset的响应结果;0表示成功,其他表示失败。其中system_off和system_reset无返回参数。
case TEESMC_OPTEED_RETURN_SUSPEND_DONE:
case TEESMC_OPTEED_RETURN_SYSTEM_OFF_DONE:
case TEESMC_OPTEED_RETURN_SYSTEM_RESET_DONE:
opteed_synchronous_sp_exit(optee_ctx, x1);

case TEESMC_OPTEED_RETURN_CALL_DONE:---------------------------------------optee处理完smc之后,需要返回普通世界,x1-x4返回参数。
assert(handle == cm_get_context(SECURE));
cm_el1_sysregs_context_save(SECURE);

    </span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Get a reference to the non-secure context </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
    ns_cpu_context </span>=<span style="color: rgba(0, 0, 0, 1)"> cm_get_context(NON_SECURE);
    assert(ns_cpu_context);

    </span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Restore non-secure state </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
    cm_el1_sysregs_context_restore(NON_SECURE);
    cm_set_next_eret_context(NON_SECURE);

    SMC_RET4(ns_cpu_context, x1, x2, x3, x4);
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case TEESMC_OPTEED_RETURN_FIQ_DONE:-----------------------------------------optee处理完fiq中断后,需要返回普通世界。 ns_cpu_context = cm_get_context(NON_SECURE); assert(ns_cpu_context); cm_el1_sysregs_context_restore(NON_SECURE); cm_set_next_eret_context(NON_SECURE);
    SMC_RET0((uint64_t) ns_cpu_context);

</span><span style="color: rgba(0, 0, 255, 1)">default</span><span style="color: rgba(0, 0, 0, 1)">:
    panic();
}
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}

void opteed_synchronous_sp_exit(optee_context_t optee_ctx, uint64_t ret)
{
assert(optee_ctx != NULL);
/
Save the Secure EL1 system register context */
assert(cm_get_context(SECURE) == &optee_ctx->cpu_ctx);
cm_el1_sysregs_context_save(SECURE);------------------------保存S.EL1下optee系统寄存器保存到cpu_context[SECURE]中。

assert(optee_ctx</span>-&gt;c_rt_ctx != <span style="color: rgba(128, 0, 128, 1)">0</span><span style="color: rgba(0, 0, 0, 1)">);
opteed_exit_sp(optee_ctx</span>-&gt;<span style="color: rgba(0, 0, 0, 1)">c_rt_ctx, ret);-------------------<span style="color: rgba(255, 0, 0, 1)">恢复optee_enter_sp()保存的C运行环境上下文。

</span></span><span style="color: rgba(0, 128, 0, 1)">/*</span><span style="color: rgba(0, 128, 0, 1)"> Should never reach here </span><span style="color: rgba(0, 128, 0, 1)">*/</span><span style="color: rgba(0, 0, 0, 1)">
assert(</span><span style="color: rgba(128, 0, 128, 1)">0</span><span style="color: rgba(0, 0, 0, 1)">);
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}

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参考文档

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