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arm64下dma相关 api（4.19）_dma_pool_alloc

作者：小小林熬夜学编程 | 2024-03-23 02:01:31

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dma_pool_alloc

相关API 

方式1：dma内存池：dma_pool_create

  1. struct dma_pool *dma_pool_create(const char *name, struct device *dev,
  2. 				 size_t size, size_t align, size_t boundary)
  3. {
  4. 	struct dma_pool *retval;
  5. 	size_t allocation;
  6. 	bool empty = false;
  7.  
  8. 	if (align == 0)
  9. 		align = 1;
  10. 	else if (align & (align - 1))
  11. 		return NULL;
  12.  
  13. 	if (size == 0)
  14. 		return NULL;
  15. 	else if (size < 4)
  16. 		size = 4;
  17.  
  18. 	if ((size % align) != 0)
  19. 		size = ALIGN(size, align);
  20.  
  21. 	allocation = max_t(size_t, size, PAGE_SIZE);
  22.  
  23. 	if (!boundary)
  24. 		boundary = allocation;
  25. 	else if ((boundary < size) || (boundary & (boundary - 1)))
  26. 		return NULL;
  27.  
  28.     //slub分配一个dma_pool 结构体
  29. 	retval = kmalloc_node(sizeof(*retval), GFP_KERNEL, dev_to_node(dev)); 
  30. 	if (!retval)
  31. 		return retval;
  32.  
  33. 	strlcpy(retval->name, name, sizeof(retval->name));
  34.  
  35. 	retval->dev = dev;
  36.  
  37. 	INIT_LIST_HEAD(&retval->page_list);
  38. 	spin_lock_init(&retval->lock);
  39. 	retval->size = size;
  40. 	retval->boundary = boundary;
  41. 	retval->allocation = allocation;
  42.  
  43. 	INIT_LIST_HEAD(&retval->pools);
  44.  
  45. 	/*
  46. 	 * pools_lock ensures that the ->dma_pools list does not get corrupted.
  47. 	 * pools_reg_lock ensures that there is not a race between
  48. 	 * dma_pool_create() and dma_pool_destroy() or within dma_pool_create()
  49. 	 * when the first invocation of dma_pool_create() failed on
  50. 	 * device_create_file() and the second assumes that it has been done (I
  51. 	 * know it is a short window).
  52. 	 */
  53. 	mutex_lock(&pools_reg_lock);
  54. 	mutex_lock(&pools_lock);
  55. 	if (list_empty(&dev->dma_pools))
  56. 		empty = true;
  57. 	list_add(&retval->pools, &dev->dma_pools);
  58. 	mutex_unlock(&pools_lock);
  59. 	if (empty) {
  60. 		int err;
  61.  
  62. 		err = device_create_file(dev, &dev_attr_pools);
  63. 		if (err) {
  64. 			mutex_lock(&pools_lock);
  65. 			list_del(&retval->pools);
  66. 			mutex_unlock(&pools_lock);
  67. 			mutex_unlock(&pools_reg_lock);
  68. 			kfree(retval);
  69. 			return NULL;
  70. 		}
  71. 	}
  72. 	mutex_unlock(&pools_reg_lock);
  73. 	return retval;
  74. }
  75. EXPORT_SYMBOL(dma_pool_create);

dma_pool_alloc：从内存池中分配，底层会调用dma_alloc_coherent分配。

  1. void *dma_pool_alloc(struct dma_pool *pool, gfp_t mem_flags,
  2. 		     dma_addr_t *handle)
  3. {
  4. 	unsigned long flags;
  5. 	struct dma_page *page;
  6. 	size_t offset;
  7. 	void *retval;
  8.  
  9. 	might_sleep_if(gfpflags_allow_blocking(mem_flags));
  10.  
  11. 	spin_lock_irqsave(&pool->lock, flags);
  12. 	list_for_each_entry(page, &pool->page_list, page_list) {
  13. 		if (page->offset < pool->allocation)
  14. 			goto ready;
  15. 	}
  16.  
  17. 	/* pool_alloc_page() might sleep, so temporarily drop &pool->lock */
  18. 	spin_unlock_irqrestore(&pool->lock, flags);
  19.     
  20.     //创建dma_page，pool_alloc_page里面使用 dma_alloc_coherent申请dma内存。
  21.  
  22. 	page = pool_alloc_page(pool, mem_flags & (~__GFP_ZERO));
  23. 	if (!page)
  24. 		return NULL;
  25.  
  26. 	spin_lock_irqsave(&pool->lock, flags);
  27.  
  28. 	list_add(&page->page_list, &pool->page_list);
  29.  ready:
  30. 	page->in_use++;
  31. 	offset = page->offset;
  32. 	page->offset = *(int *)(page->vaddr + offset);
  33. 	retval = offset + page->vaddr;
  34. 	*handle = offset + page->dma;
  35. #ifdef	DMAPOOL_DEBUG
  36. 	{
  37. 		int i;
  38. 		u8 *data = retval;
  39. 		/* page->offset is stored in first 4 bytes */
  40. 		for (i = sizeof(page->offset); i < pool->size; i++) {
  41. 			if (data[i] == POOL_POISON_FREED)
  42. 				continue;
  43. 			if (pool->dev)
  44. 				dev_err(pool->dev,
  45. 					"dma_pool_alloc %s, %p (corrupted)\n",
  46. 					pool->name, retval);
  47. 			else
  48. 				pr_err("dma_pool_alloc %s, %p (corrupted)\n",
  49. 					pool->name, retval);
  50.  
  51. 			/*
  52. 			 * Dump the first 4 bytes even if they are not
  53. 			 * POOL_POISON_FREED
  54. 			 */
  55. 			print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1,
  56. 					data, pool->size, 1);
  57. 			break;
  58. 		}
  59. 	}
  60. 	if (!(mem_flags & __GFP_ZERO))
  61. 		memset(retval, POOL_POISON_ALLOCATED, pool->size);
  62. #endif
  63. 	spin_unlock_irqrestore(&pool->lock, flags);
  64.  
  65. 	if (mem_flags & __GFP_ZERO)
  66. 		memset(retval, 0, pool->size);
  67.  
  68. 	return retval;
  69. }
  70. EXPORT_SYMBOL(dma_pool_alloc);

 dma_pool结构体：

  1. struct dma_pool {               /* the pool */
  2.         struct list_head page_list;
  3.         spinlock_t lock;
  4.         size_t size;
  5.         struct device *dev;
  6.         size_t allocation;
  7.         size_t boundary;
  8.         char name[32];
  9.         struct list_head pools;
  10. };
  11.  
  12. struct dma_page {               /* cacheable header for 'allocation' bytes */
  13.         struct list_head page_list;
  14.         void *vaddr;
  15.         dma_addr_t dma;
  16.         unsigned int in_use;
  17.         unsigned int offset;
  18. };

pool_alloc_page:

  1. static struct dma_page *pool_alloc_page(struct dma_pool *pool, gfp_t mem_flags)
  2. {
  3. 	struct dma_page *page;
  4.  
  5. 	page = kmalloc(sizeof(*page), mem_flags);
  6. 	if (!page)
  7. 		return NULL;
  8. 	page->vaddr = dma_alloc_coherent(pool->dev, pool->allocation,
  9. 					 &page->dma, mem_flags);
  10. 	if (page->vaddr) {
  11. #ifdef	DMAPOOL_DEBUG
  12. 		memset(page->vaddr, POOL_POISON_FREED, pool->allocation);
  13. #endif
  14. 		pool_initialise_page(pool, page);
  15. 		page->in_use = 0;
  16. 		page->offset = 0;
  17. 	} else {
  18. 		kfree(page);
  19. 		page = NULL;
  20. 	}
  21. 	return page;
  22. }

dma_alloc_coherent: 一致性内存，创建即映射，一直存在。

  1. static inline void *dma_alloc_coherent(struct device *dev, size_t size,
  2. 		dma_addr_t *dma_handle, gfp_t flag)
  3. {
  4. 	return dma_alloc_attrs(dev, size, dma_handle, flag, 0);
  5. }
  6.  
  7.  
  8.  
  9. static inline void *dma_alloc_attrs(struct device *dev, size_t size,
  10. 				       dma_addr_t *dma_handle, gfp_t flag,
  11. 				       unsigned long attrs)
  12. {
  13. 	const struct dma_map_ops *ops = get_dma_ops(dev);
  14. 	void *cpu_addr;
  15.  
  16. 	BUG_ON(!ops);
  17. 	WARN_ON_ONCE(dev && !dev->coherent_dma_mask);
  18.  
  19. 	if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr))
  20. 		return cpu_addr;
  21.  
  22. 	/* let the implementation decide on the zone to allocate from: */
  23. 	flag &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
  24.  
  25. 	if (!arch_dma_alloc_attrs(&dev))
  26. 		return NULL;
  27. 	if (!ops->alloc)
  28. 		return NULL;
  29.  
  30. //通过ops->alloc来分配
  31. 	cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs);
  32. 	debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
  33. 	return cpu_addr;
  34. }

上述使用ops->alloc来分配；在arm64下pci设备在probe的过程中会通过arch_setup_dma_ops设置：

[   38.254846] ===arch_setup_dma_ops dev ffff834b41814098 dev->dma_ops ffff000008a50000
[   38.262741] CPU: 26 PID: 1 Comm: swapper/0 Not tainted 4.19.0l.1118+ #15
[   38.269409] Hardware name: PHYTIUM LTD Phytium S2500 Development Platform/Phytium S2500 Development Platform, BIOS EDK II Jan 20 2021
[   38.281348] Call trace:
[   38.283789]  dump_backtrace+0x0/0x190
[   38.287435]  show_stack+0x28/0x38
[   38.290735]  dump_stack+0x90/0xb4
[   38.294035]  arch_setup_dma_ops+0x9c/0xe0
[   38.298029]  acpi_dma_configure+0x7c/0xb0
[   38.302020]  pci_dma_configure+0xc8/0xd8
[   38.305925]  dma_configure+0x34/0x40
[   38.309485]  really_probe+0x90/0x3a8
[   38.313043]  driver_probe_device+0x70/0x140
[   38.317206]  __driver_attach+0x11c/0x158
[   38.321109]  bus_for_each_dev+0x88/0xd8
[   38.324926]  driver_attach+0x34/0x40
[   38.328485]  bus_add_driver+0x214/0x258
[   38.332301]  driver_register+0x68/0x118
[   38.336118]  __pci_register_driver+0x5c/0x70
[   38.340369]  nvme_init+0x2c/0x34
[   38.343581]  do_one_initcall+0x6c/0x1ec
[   38.347400]  kernel_init_freeable+0x2d4/0x390
[   38.351737]  kernel_init+0x1c/0x110
[   38.355209]  ret_from_fork+0x10/0x18
 

arch_setup_dma_ops函数： arch/arn64/mm/dma-mapping.c

  1.  
  2.  
  3. void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
  4.                         const struct iommu_ops *iommu, bool coherent)
  5. {
  6.         if (!dev->dma_ops)
  7.                 dev->dma_ops = &arm64_swiotlb_dma_ops; //使用该ops
  8.  
  9.         dev->archdata.dma_coherent = coherent;
  10.         __iommu_setup_dma_ops(dev, dma_base, size, iommu);
  11.         printk("===arch_setup_dma_ops dev %llx name %s dev->dma_ops %llx   \n",dev,dev_name(dev),dev->dma_ops);
  12. #ifdef CONFIG_XEN
  13.         if (xen_initial_domain()) {
  14.                 dev->archdata.dev_dma_ops = dev->dma_ops;
  15.                 dev->dma_ops = xen_dma_ops;
  16.         }
  17. #endif
  18. }
  19.  
  20. static void __iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
  21.                                   const struct iommu_ops *ops)
  22. {
  23.         struct iommu_domain *domain;
  24.  
  25.         if (!ops)
  26.                 return;
  27.  
  28.         /*
  29.          * The IOMMU core code allocates the default DMA domain, which the
  30.          * underlying IOMMU driver needs to support via the dma-iommu layer.
  31.          */
  32.         domain = iommu_get_domain_for_dev(dev);
  33.  
  34.         if (!domain)
  35.                 goto out_err;
  36.  
  37. //判断domain-type类型，如果硬件不支持则依然是swiotlb软件实现地址映射。否则iommu_dma_ops。
  38.         if (domain->type == IOMMU_DOMAIN_DMA) {
  39.                 if (iommu_dma_init_domain(domain, dma_base, size, dev))
  40.                         goto out_err;
  41.                 
  42.                 dev->dma_ops = &iommu_dma_ops;
  43.         }
  44.  
  45.         return;
  46.  
  47. out_err:
  48.          pr_warn("Failed to set up IOMMU for device %s; retaining platform DMA ops\n",
  49.                  dev_name(dev));
  50. }

上述打印： 

[   38.094271] ===arch_setup_dma_ops dev ffff835b41594098 name 0000:03:00.0 dev->dma_ops ffff000008a50000  
[   38.606332] ===arch_setup_dma_ops dev ffff835b41595098 name 0000:04:00.0 dev->dma_ops ffff000008a50000  
[   39.698185] ===arch_setup_dma_ops dev ffff835b41596098 name 0000:05:00.0 dev->dma_ops ffff000008a50000  
[   41.540046] ===arch_setup_dma_ops dev ffff835b415a1098 name 0001:03:00.0 dev->dma_ops ffff000008a50000  
[   45.113132] ===arch_setup_dma_ops dev ffff835b41599098 name 0000:13:00.0 dev->dma_ops ffff000008a50000  
[   92.951271] ===arch_setup_dma_ops dev ffff835b41597098 name 0000:12:00.0 dev->dma_ops ffff000008a50000  
[   93.234855] ===arch_setup_dma_ops dev ffff835b4159b098 name 0000:15:00.0 dev->dma_ops ffff000008a50000  
[   93.260169] ===arch_setup_dma_ops dev ffff835b41598098 name 0000:12:00.1 dev->dma_ops ffff000008a50000 

[root@localhost linux-4.19]# cat  /proc/kallsyms |grep 8a50000
ffff000008a50000 r arm64_swiotlb_dma_ops
ffff000008a50000 R vdso_end
 

例：驱动使用ops的map_page函数：

[  421.258031]  dump_backtrace+0x0/0x1b8
[  421.265029]  show_stack+0x24/0x30
[  421.271647]  dump_stack+0x90/0xb4
[  421.278219]  __swiotlb_map_page+0x60/0xf0
[  421.285523]  e1000_alloc_rx_buffers+0xe4/0x2a8 [e1000e]
[  421.294189]  e1000_clean_rx_irq+0x2f0/0x3c8 [e1000e]
[  421.294200]  e1000e_poll+0xc4/0x2b8 [e1000e]
[  421.310160]  net_rx_action+0x180/0x410
[  421.317226]  __do_softirq+0x11c/0x30c
[  421.324211]  irq_exit+0x108/0x120
[  421.330850]  __handle_domain_irq+0x6c/0xc0
[  421.338213]  gic_handle_irq+0x80/0x18c
[  421.345212]  el1_irq+0xb0/0x140
[  421.351620]  arch_cpu_idle+0x30/0x1b8
[  421.358532]  do_idle+0x1dc/0x2a8
[  421.365010]  cpu_startup_entry+0x2c/0x30
[  421.372205]  secondary_start_kernel+0x180/0x1c8

关于domain_type：IOMMU_DOMAIN_DMA

  1. static int __init iommu_set_def_domain_type(char *str)
  2. {
  3.         bool pt;
  4.         int ret;
  5.  
  6.         ret = kstrtobool(str, &pt);
  7.         if (ret)
  8.                 return ret;
  9.  
  10. #ifdef CONFIG_ARCH_PHYTIUM
  11.         /*
  12.          * Always set default iommu type to IOMMU_DOMAIN_IDENTITY
  13.          * on Phytium FT-2000+ SoC to avoid unnecessary troubles
  14.          * introduced by the SMMU workaround.
  15.          */
  16.         if ((read_cpuid_id() & MIDR_CPU_MODEL_MASK) == MIDR_PHYTIUM_FT2000PLUS)
  17.                 iommu_def_domain_type = IOMMU_DOMAIN_IDENTITY;
  18.         else
  19.                 iommu_def_domain_type = pt ? IOMMU_DOMAIN_IDENTITY : IOMMU_DOMAIN_DMA;
  20. #else
  21.         iommu_def_domain_type = pt ? IOMMU_DOMAIN_IDENTITY : IOMMU_DOMAIN_DMA;
  22. #endif
  23.         return 0;
  24. }
  25. early_param("iommu.passthrough", iommu_set_def_domain_type);

分配iommu_domain： 

  1. static struct iommu_domain *__iommu_domain_alloc(struct bus_type *bus,
  2.                                                  unsigned type)
  3. {
  4.         struct iommu_domain *domain;
  5.  
  6.         if (bus == NULL || bus->iommu_ops == NULL)
  7.                 return NULL;
  8.  
  9.         domain = bus->iommu_ops->domain_alloc(type);
  10. //调用总线中的iommu_ops->domain_alloc 。 比如pci_bus的，在arm-smmu.c 的arm_smmu_bus_init 函数。
  11.         if (!domain)
  12.                 return NULL;
  13.  
  14.         domain->ops  = bus->iommu_ops;
  15.         domain->type = type;
  16.         /* Assume all sizes by default; the driver may override this later */
  17.         domain->pgsize_bitmap  = bus->iommu_ops->pgsize_bitmap;
  18.  
  19.         return domain;
  20. }
  21.  
  22. struct iommu_domain *iommu_domain_alloc(struct bus_type *bus)
  23. {
  24.         return __iommu_domain_alloc(bus, IOMMU_DOMAIN_UNMANAGED);
  25. }
  26. EXPORT_SYMBOL_GPL(iommu_domain_alloc);

arm64_swiotlb_dma_ops :alloc函数

  1. static void *__dma_alloc(struct device *dev, size_t size,
  2. 			 dma_addr_t *dma_handle, gfp_t flags,
  3. 			 unsigned long attrs)
  4. {
  5. 	struct page *page;
  6. 	void *ptr, *coherent_ptr;
  7. 	bool coherent = is_device_dma_coherent(dev);
  8. 	pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL, false);
  9.  
  10. 	size = PAGE_ALIGN(size);
  11.  
  12. 	if (!coherent && !gfpflags_allow_blocking(flags)) {
  13. 		struct page *page = NULL;
  14. 		void *addr = __alloc_from_pool(size, &page, flags);
  15.  
  16. 		if (addr)
  17. 			*dma_handle = phys_to_dma(dev, page_to_phys(page));
  18.  
  19. 		return addr;
  20. 	}
  21.     //走这里 。。。。。。。。。。
  22. 	ptr = swiotlb_alloc(dev, size, dma_handle, flags, attrs);
  23. 	if (!ptr)
  24. 		goto no_mem;
  25.  
  26. 	/* no need for non-cacheable mapping if coherent */
  27. 	if (coherent)
  28. 		return ptr;
  29.  
  30. 	/* remove any dirty cache lines on the kernel alias */
  31. 	__dma_flush_area(ptr, size);
  32.  
  33. 	/* create a coherent mapping */
  34. 	page = virt_to_page(ptr);
  35. 	coherent_ptr = dma_common_contiguous_remap(page, size, VM_USERMAP,
  36. 						   prot, __builtin_return_address(0));
  37. 	if (!coherent_ptr)
  38. 		goto no_map;
  39.  
  40. 	return coherent_ptr;
  41.  
  42. no_map:
  43. 	swiotlb_free(dev, size, ptr, *dma_handle, attrs);
  44. no_mem:
  45. 	return NULL;
  46. }

 swiotlb_alloc函数： 

  1. void *swiotlb_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
  2. 		gfp_t gfp, unsigned long attrs)
  3. {
  4. 	void *vaddr;
  5.  
  6. 	/* temporary workaround: */
  7. 	if (gfp & __GFP_NOWARN)
  8. 		attrs |= DMA_ATTR_NO_WARN;
  9.  
  10. 	/*
  11. 	 * Don't print a warning when the first allocation attempt fails.
  12. 	 * swiotlb_alloc_coherent() will print a warning when the DMA memory
  13. 	 * allocation ultimately failed.
  14. 	 */
  15. 	gfp |= __GFP_NOWARN;
  16.     //debug发现使用dma_direct_alloc
  17. 	vaddr = dma_direct_alloc(dev, size, dma_handle, gfp, attrs);
  18. 	if (!vaddr)
  19. 		vaddr = swiotlb_alloc_buffer(dev, size, dma_handle, attrs);
  20. 	return vaddr;
  21. }
  22.  
  23.  
  24. //kernel/dma/direct.c
  25. void *dma_direct_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
  26. 		gfp_t gfp, unsigned long attrs)
  27. {
  28. 	unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
  29. 	int page_order = get_order(size);
  30. 	struct page *page = NULL;
  31. 	void *ret;
  32.  
  33. 	/* we always manually zero the memory once we are done: */
  34. 	gfp &= ~__GFP_ZERO;
  35.  
  36. 	/* GFP_DMA32 and GFP_DMA are no ops without the corresponding zones: */
  37. 	if (dev->coherent_dma_mask <= DMA_BIT_MASK(ARCH_ZONE_DMA_BITS))
  38. 		gfp |= GFP_DMA;
  39. 	if (dev->coherent_dma_mask <= DMA_BIT_MASK(32) && !(gfp & GFP_DMA))
  40. 		gfp |= GFP_DMA32;
  41.  
  42. again:
  43. 	/* CMA can be used only in the context which permits sleeping */
  44. 	if (gfpflags_allow_blocking(gfp)) {
  45. 		page = dma_alloc_from_contiguous(dev, count, page_order,
  46. 						 gfp & __GFP_NOWARN);
  47. 		if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
  48. 			dma_release_from_contiguous(dev, page, count);
  49. 			page = NULL;
  50. 		}
  51. 	}
  52. 	if (!page)
  53. 		page = alloc_pages_node(dev_to_node(dev), gfp, page_order);
  54.  
  55. 	if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
  56. 		__free_pages(page, page_order);
  57. 		page = NULL;
  58.  
  59. 		if (IS_ENABLED(CONFIG_ZONE_DMA32) &&
  60. 		    dev->coherent_dma_mask < DMA_BIT_MASK(64) &&
  61. 		    !(gfp & (GFP_DMA32 | GFP_DMA))) {
  62. 			gfp |= GFP_DMA32;
  63. 			goto again;
  64. 		}
  65.  
  66. 		if (IS_ENABLED(CONFIG_ZONE_DMA) &&
  67. 		    dev->coherent_dma_mask < DMA_BIT_MASK(32) &&
  68. 		    !(gfp & GFP_DMA)) {
  69. 			gfp = (gfp & ~GFP_DMA32) | GFP_DMA;
  70. 			goto again;
  71. 		}
  72. 	}
  73.  
  74. 	if (!page)
  75. 		return NULL;
  76. 	ret = page_address(page);
  77. 	if (force_dma_unencrypted()) {
  78. 		set_memory_decrypted((unsigned long)ret, 1 << page_order);
  79. 		*dma_handle = __phys_to_dma(dev, page_to_phys(page));
  80. 	} else {
  81. 		*dma_handle = phys_to_dma(dev, page_to_phys(page));
  82. 	}
  83. 	memset(ret, 0, size);
  84. 	return ret;
  85. }

IOMMU/SMMU:

打开smmu的情况下

分配iommu_group 堆栈

arm_smmu add device
    arm_smmu_master_alloc_smes->iommu_group_get_for_dev   创建iommu_group->iommu_domain
分配iommu_group
[   51.916741]  iommu_group_alloc+0x1b0/0x1f0
[   51.920817]  pci_device_group+0x108/0x128
[   51.924808]  arm_smmu_device_group+0xc4/0xd0
[   51.929056]  iommu_group_get_for_dev+0x54/0x180
[   51.933565]  arm_smmu_add_device+0x19c/0x618
[   51.937815]  iort_iommu_configure+0x110/0x1c8 //通过iort_add_device_replay调用iommu_ops->add_device(dev)函数。
[   51.942152]  acpi_dma_configure+0x54/0xb0
[   51.946143]  pci_dma_configure+0xc8/0xd8
[   51.950047]  dma_configure+0x34/0x40 //调用bus_type下的dma_configure回调，pci_bus_type是pci_dma_configure
[   51.953606]  really_probe+0x90/0x3a8  //注意：pci_bridge并没有驱动，不会probe。
[   51.957164]  driver_probe_device+0x70/0x140
[   51.961327]  __driver_attach+0x11c/0x158
[   51.965231]  bus_for_each_dev+0x88/0xd8
[   51.969048]  driver_attach+0x34/0x40
[   51.972606]  bus_add_driver+0x214/0x258
[   51.976423]  driver_register+0x68/0x118
[   51.980240]  __pci_register_driver+0x5c/0x70
[   51.984491]  nvme_init+0x2c/0x34
[   51.987703]  do_one_initcall+0x6c/0x1ec
[   51.991522]  kernel_init_freeable+0x2d4/0x390
[   51.995858]  kernel_init+0x1c/0x110
[   51.999329]  ret_from_fork+0x10/0x18

  1. struct iommu_group *pci_device_group(struct device *dev)
  2. {
  3.     struct pci_dev *pdev = to_pci_dev(dev);
  4.  
  5.     /*
  6.      * Find the upstream DMA alias for the device.  A device must not
  7.      * be aliased due to topology in order to have its own IOMMU group.
  8.      * If we find an alias along the way that already belongs to a
  9.      * group, use it.
  10.      */  
  11.     if (pci_for_each_dma_alias(pdev, get_pci_alias_or_group, &data))
  12.         return data.group;
  13.  
  14.     /*
  15.      * Continue upstream from the point of minimum IOMMU granularity
  16.      * due to aliases to the point where devices are protected from
  17.      * peer-to-peer DMA by PCI ACS.  Again, if we find an existing
  18.      * group, use it.
  19.   */
  20.  for (bus = pdev->bus; !pci_is_root_bus(bus); bus = bus->parent) {
  21.   if (!bus->self)
  22.    continue;
  23.  
  24.   if (pci_acs_path_enabled(bus->self, NULL, REQ_ACS_FLAGS))
  25.    break;
  26.  
  27.   pdev = bus->self;
  28.   group = iommu_group_get(&pdev->dev);
  29.   if (group)
  30.    return group;
  31.    }
  32.  
  33.     /*   
  34.      * Look for existing groups on device aliases.  If we alias another
  35.      * device or another device aliases us, use the same group.
  36.      */
  37.     group = get_pci_alias_group(pdev, (unsigned long *)devfns);
  38.     if (group)
  39.         return group;
  40.  
  41.     /*   
  42.      * Look for existing groups on non-isolated functions on the same
  43.      * slot and aliases of those funcions, if any.  No need to clear
  44.      * the search bitmap, the tested devfns are still valid.
  45.      */
  46.     group = get_pci_function_alias_group(pdev, (unsigned long *)devfns);
  47.     if (group)
  48.         return group;
  49.  
  50.  return iommu_group_alloc();
  51. }
  52. 这个函数的核心逻辑在于pci_acs_path_enabled，简单来说如果是pcie的设备则检查该设备到root complex的路径上如果都开启了ACS则这个设备就单独成一个iommu_group，如果不是则找到它的alias group就行了比如如果这个是传统的pci bus(没有pcie这些ACS的特性)则这个pci bus下面的所有设备就组合成一个iommu_group。

开启smmu后dmam_alloc_coherent:

使用

  1. static const struct dma_map_ops iommu_dma_ops = {
  2.         .alloc = __iommu_alloc_attrs,
  3.         .free = __iommu_free_attrs,
  4.         .mmap = __iommu_mmap_attrs,
  5.         .get_sgtable = __iommu_get_sgtable,
  6.         .map_page = __iommu_map_page,
  7.         .unmap_page = __iommu_unmap_page,
  8.         .map_sg = __iommu_map_sg_attrs,
  9.         .unmap_sg = __iommu_unmap_sg_attrs,
  10.         .sync_single_for_cpu = __iommu_sync_single_for_cpu,
  11.         .sync_single_for_device = __iommu_sync_single_for_device,
  12.         .sync_sg_for_cpu = __iommu_sync_sg_for_cpu,
  13.         .sync_sg_for_device = __iommu_sync_sg_for_device,
  14.         .map_resource = iommu_dma_map_resource,
  15.         .unmap_resource = iommu_dma_unmap_resource,
  16.         .mapping_error = iommu_dma_mapping_error,
  17. };
  18.

其中__iommu_alloc_attrs调用iommu_dma_alloc 申请page页：

  1. struct page **iommu_dma_alloc(struct device *dev, size_t size, gfp_t gfp,
  2. 		unsigned long attrs, int prot, dma_addr_t *handle,
  3. 		void (*flush_page)(struct device *, const void *, phys_addr_t))
  4. {
  5.  
  6. //这里申请任意物理地址页。
  7. 	count = PAGE_ALIGN(size) >> PAGE_SHIFT;
  8. 	pages = __iommu_dma_alloc_pages(count, alloc_sizes >> PAGE_SHIFT, gfp); 
  9. 	if (!pages)
  10. 		return NULL;
  11.  
  12. //这里申请iova是dma能访问的4G以下的虚拟地址。
  13. 	size = iova_align(iovad, size);
  14. 	iova = iommu_dma_alloc_iova(domain, size, dev->coherent_dma_mask, dev); 
  15. 	if (!iova)
  16. 		goto out_free_pages;
  17.  
  18. 	if (sg_alloc_table_from_pages(&sgt, pages, count, 0, size, GFP_KERNEL))
  19. 		goto out_free_iova;
  20.  
  21. 	if (!(prot & IOMMU_CACHE)) {
  22. 		struct sg_mapping_iter miter;
  23. 		/*
  24. 		 * The CPU-centric flushing implied by SG_MITER_TO_SG isn't
  25. 		 * sufficient here, so skip it by using the "wrong" direction.
  26. 		 */
  27. 		sg_miter_start(&miter, sgt.sgl, sgt.orig_nents, SG_MITER_FROM_SG);
  28. 		while (sg_miter_next(&miter))
  29. 			flush_page(dev, miter.addr, page_to_phys(miter.page));
  30. 		sg_miter_stop(&miter);
  31. 	}
  32.     //建立映射。
  33. 	if (iommu_map_sg(domain, iova, sgt.sgl, sgt.orig_nents, prot)
  34. 			< size)
  35. 		goto out_free_sg;
  37. 	*handle = iova;
  38. 	sg_free_table(&sgt);
  39. 	return pages;
  41. }

drivers/iommu/dma-iommu.c中

[   20.258409] ===iommu_dma_alloc page count 2 poage0 va ffff810789a20000 pa 10809a20000 iova fffe0000
[   20.267503] CPU: 0 PID: 748 Comm: kworker/0:2 Not tainted 4.19.0l+ #12
[   20.273999] Hardware name: PHYTIUM LTD Phytium S2500/64/Phytium S2500/64, BIOS V2.2 Feb  9 2021
[   20.282662] Workqueue: events work_for_cpu_fn
[   20.286999] Call trace:
[   20.289436]  dump_backtrace+0x0/0x1c0
[   20.293080]  show_stack+0x24/0x30
[   20.296379]  dump_stack+0x9c/0xbc
[   20.299678]  iommu_dma_alloc+0x234/0x460
[   20.303582]  __iommu_alloc_attrs+0xe4/0x2b0
[   20.307746]  dmam_alloc_coherent+0xb0/0x160
[   20.311910]  ahci_port_start+0x11c/0x220
[   20.315814]  ata_host_start.part.6+0xe4/0x1e8
[   20.320150]  ata_host_activate+0x70/0x150
[   20.324139]  ahci_host_activate+0x164/0x1b8
[   20.328302]  ahci_init_one+0x970/0xde4
[   20.332034]  local_pci_probe+0x44/0xa8
[   20.335764]  work_for_cpu_fn+0x20/0x30
[   20.339494]  process_one_work+0x1c4/0x408
[   20.343483]  worker_thread+0x228/0x488
[   20.347214]  kthread+0x130/0x138
[   20.350427]  ret_from_fork+0x10/0x1c

上述证明iova地址是4G内，而实际的物理地址可以实大于4G的范围，由SMMU硬件负责映射。和mmu类似。

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