在使用vivado2018.3使用memory interface generator配置DDR3时，自定义配置保存失败

        在使用memory interface generator配置DDR3时，由于使用DDR3 row addr=16，column addr=10,bank addr=3，需基于模板自定义配置，配置界面如下：

        生bit流报错，报错如下，提示DDR3_addr[15]引脚未约束或不存在：

[DRC NSTD-1] Unspecified I/O Standard: 1 out of 117 logical ports use I/O standard (IOSTANDARD) value 'DEFAULT', instead of a user assigned specific value. This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all I/O standards. This design will fail to generate a bitstream unless all logical ports have a user specified I/O standard value defined. To allow bitstream creation with unspecified I/O standard values (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks NSTD-1].  NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run. Problem ports: DDR3_addr[15].

        重新打开IP后发现之前自定义配置保存失败，导致DDR3_addr[15]引脚不存在，引发报错，如下图所示：

        查资料发现时因为vivado2018.3需要打一个补丁，打完补丁后问题解决，官方回答如下：

71898 - MIG 7 Series - Tactical Patch - 2018.3 Known Issues (xilinx.com)