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目录
一、用 AT32_Work_Bench 工具成生系统时钟代码,如下图:
三、把函数名改一下,改成void system_clock_config(void) ,如上图已经改好了的。
四、在工程项目中找到at32F421_conf.h文件,在文件中找到下面这行代码,这行代码是更改外部晶振频率的,按你的晶振频率更改,晶振频率相同就不用改了。8000000代表8M。
- void system_clock_config(void) // wk_system_clock_config
- {
- /* reset crm */
- crm_reset();
-
- /* config flash psr register */
- flash_psr_set(FLASH_WAIT_CYCLE_3);
-
- /* enable lick */
- crm_clock_source_enable(CRM_CLOCK_SOURCE_LICK, TRUE);
-
- /* wait till lick is ready */
- while(crm_flag_get(CRM_LICK_STABLE_FLAG) != SET)
- {
- }
-
- /* enable hext */
- crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
-
- /* wait till hext is ready */
- while(crm_hext_stable_wait() == ERROR)
- {
- }
-
- /* enable hick */
- crm_clock_source_enable(CRM_CLOCK_SOURCE_HICK, TRUE);
-
- /* wait till hick is ready */
- while(crm_flag_get(CRM_HICK_STABLE_FLAG) != SET)
- {
- }
-
- /* config pll clock resource */
- crm_pll_config2(CRM_PLL_SOURCE_HEXT, 120, 1, CRM_PLL_FR_8);
-
- /* enable pll */
- crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
-
- /* wait till pll is ready */
- while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
- {
- }
-
- /* config ahbclk */
- crm_ahb_div_set(CRM_AHB_DIV_1);
-
- /* config apb2clk */
- crm_apb2_div_set(CRM_APB2_DIV_1);
-
- /* config apb1clk */
- crm_apb1_div_set(CRM_APB1_DIV_1);
-
- /* enable auto step mode */
- crm_auto_step_mode_enable(TRUE);
-
- /* select pll as system clock source */
- crm_sysclk_switch(CRM_SCLK_PLL);
-
- /* wait till pll is used as system clock source */
- while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
- {
- }
-
- /* disable auto step mode */
- crm_auto_step_mode_enable(FALSE);
-
- /* update system_core_clock global variable */
- system_core_clock_update();
- }
#define HEXT_VALUE ((uint32_t)8000000)
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