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/****************************************************************************** * * Copyright (C) 2012 - 2014 Xilinx, Inc. All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Except as contained in this notice, the name of the Xilinx shall not be used * in advertising or otherwise to promote the sale, use or other dealings in * this Software without prior written authorization from Xilinx. * ******************************************************************************/ /*****************************************************************************/ /** * @file xspi_numonyx_flash_quad_example.c * * This file contains a design example using the SPI driver (XSpi) and axi_qspi * device with a Numonyx quad serial flash device in the interrupt mode. * This example erases a Sector, writes to a Page within the Sector, reads back * from that Page and compares the data. * * This example has been tested with an N25Q128 device on KC705 and ZC770 * board. The bytes per page (PAGE_SIZE) in N25Q128 is 256. * * @note * * None. * * <pre> * MODIFICATION HISTORY: * * Ver Who Date Changes * ----- ---- -------- ----------------------------------------------- * 1.00a bss 08/08/12 First release * 3.04a bss 02/11/13 Modified to use ScuGic in case of Zynq (CR#683510) * 4.2 ms 01/23/17 Added fmsh_print statement in main function to * ensure that "Successfully ran" and "Failed" strings * are available in all examples. This is a fix for * CR-965028. * ms 04/05/17 Modified Comment lines to follow doxygen rules. * </pre> * ******************************************************************************/ /***************************** Include Files *********************************/ #include "xparameters.h" /* EDK generated parameters */ #include "xspi.h" /* SPI device driver */ #include "xil_exception.h" #include "fmsh_common.h" #include "platform.h" #include <stdio.h> #include "fmsh_gic.h" #include "fmsh_print.h" #include "fmsh_common_types.h" /************************** Constant Definitions *****************************/ /* * The following constants map to the XPAR parameters created in the * xparameters.h file. They are defined here such that a user can easily * change all the needed parameters in one place. */ #define SPI_DEVICE_ID XPAR_SPI_0_DEVICE_ID /* XPAR_INTC_0_DEVICE_ID */ /* * The following constant defines the slave select signal that is used to * to select the Flash device on the SPI bus, this signal is typically * connected to the chip select of the device. */ #define SPI_SELECT 0x01 /* * Definitions of the commands shown in this example. */ #define COMMAND_PAGE_PROGRAM 0x02 /* Page Program command */ #define COMMAND_QUAD_WRITE 0x32 /* Quad Input Fast Program */ #define COMMAND_RANDOM_READ 0x03 /* Random read command */ #define COMMAND_DUAL_READ 0x3B /* Dual Output Fast Read */ #define COMMAND_DUAL_IO_READ 0xBB /* Dual IO Fast Read */ #define COMMAND_QUAD_READ 0x6B /* Quad Output Fast Read */ #define COMMAND_QUAD_IO_READ 0xEB /* Quad IO Fast Read */ #define COMMAND_WRITE_ENABLE 0x06 /* Write Enable command */ #define COMMAND_SECTOR_ERASE 0xD8 /* Sector Erase command */ #define COMMAND_BULK_ERASE 0xC7 /* Bulk Erase command */ #define COMMAND_STATUSREG_READ 0x05 /* Status read command */ #define COMMAND_4_BYTE_ENABLE 0xB7/* exit 4-BYTE ADDRESS*/ /** * This definitions specify the EXTRA bytes in each of the command * transactions. This count includes Command byte, address bytes and any * don't care bytes needed. */ #define READ_WRITE_EXTRA_BYTES 5 /* Read/Write extra bytes */ #define WRITE_ENABLE_BYTES 1 /* Write Enable bytes */ #define SECTOR_ERASE_BYTES 4 /* Sector erase extra bytes */ #define BULK_ERASE_BYTES 1 /* Bulk erase extra bytes */ #define STATUS_READ_BYTES 2 /* Status read bytes count */ #define STATUS_WRITE_BYTES 2 /* Status write bytes count */ /* * Flash not busy mask in the status register of the flash device. */ #define FLASH_SR_IS_READY_MASK 0x01 /* Ready mask */ /* * Number of bytes per page in the flash device. */ #define PAGE_SIZE 256 /* * Address of the page to perform Erase, Write and Read operations. */ #define FLASH_TEST_ADDRESS 0x00 /* * Byte Positions. */ #define BYTE1 0 /* Byte 1 position */ #define BYTE2 1 /* Byte 2 position */ #define BYTE3 2 /* Byte 3 position */ #define BYTE4 3 /* Byte 4 position */ #define BYTE5 4 /* Byte 5 position */ #define BYTE6 5 /* Byte 6 position */ #define BYTE7 6 /* Byte 7 position */ #define BYTE8 7 /* Byte 8 position */ /* * The following definitions specify the number of dummy bytes to ignore in the * data read from the flash, through various Read commands. This is apart from * the dummy bytes returned in reponse to the command and address transmitted. */ /* * After transmitting Dual Read command and address on DIO0,the quad spi device * configures DIO0 and DIO1 in input mode and receives data on both DIO0 and * DIO1 for 8 dummy clock cycles. So we end up with 16 dummy bits in DRR. The * same logic applies Quad read command, so we end up with 4 dummy bytes in * that case. */ #define DUAL_READ_DUMMY_BYTES 2 #define QUAD_READ_DUMMY_BYTES 4 #define DUAL_IO_READ_DUMMY_BYTES 2 #define QUAD_IO_READ_DUMMY_BYTES 5 /**************************** Type Definitions *******************************/ /***************** Macros (Inline Functions) Definitions *********************/ /************************** Function Prototypes ******************************/ int SpiFlashWriteEnable(XSpi *SpiPtr); int SpiFlashWrite(XSpi *SpiPtr, u32 Addr, u32 ByteCount, u8 WriteCmd); int SpiFlashRead(XSpi *SpiPtr, u32 Addr, u32 ByteCount, u8 ReadCmd); int SpiFlashBulkErase(XSpi *SpiPtr); int SpiFlashSectorErase(XSpi *SpiPtr, u32 Addr); int SpiFlashGetStatus(XSpi *SpiPtr); int SpiFlashQuadEnable(XSpi *SpiPtr); int SpiFlashEnableHPM(XSpi *SpiPtr); int Spi_4BYTE_Enable(XSpi *SpiPt); static int SpiFlashWaitForFlashReady(void); void SpiHandler(void *CallBackRef, u32 StatusEvent, unsigned int ByteCount); int axi_irq_request(void *InstancePtr); /************************** Variable Definitions *****************************/ /* * The instances to support the device drivers are global such that they * are initialized to zero each time the program runs. They could be local * but should at least be static so they are zeroed. */ static XSpi Spi; //INTC InterruptController; /* * The following variables are shared between non-interrupt processing and * interrupt processing such that they must be global. */ volatile static int TransferInProgress; /* * The following variable tracks any errors that occur during interrupt * processing. */ static int ErrorCount; /* * Buffers used during read and write transactions. */ static u8 ReadBuffer[PAGE_SIZE + READ_WRITE_EXTRA_BYTES + 4]; static u8 WriteBuffer[PAGE_SIZE + READ_WRITE_EXTRA_BYTES]; /* * Byte offset value written to Flash. This needs to be redefined for writing * different patterns of data to the Flash device. */ static u8 TestByte = 0x20; /************************** Function Definitions *****************************/ /*****************************************************************************/ /** * * Main function to run the quad flash example. * * @param None * * @return XST_SUCCESS if successful else XST_FAILURE. * * @note None * ******************************************************************************/ int main(void) { int Status; u32 Index; u32 i; u32 k; u32 j; u32 read_ture_cnt=0; u32 read_flied_cnt=0; u32 dual_read_ture_cnt=0; u32 dual_read_flied_cnt=0; u32 flash_erase_cnt=0; u32 Address; XSpi_Config *ConfigPtr; /* Pointer to Configuration data */ init_platform(); FMSH_WriteReg(FPS_SLCR_BASEADDR, 0x008, 0xDF0D767BU); //unlock FMSH_WriteReg(FPS_SLCR_BASEADDR, 0x838, 0xf); //Open USER_LVL_SHFTR_EN_A and USER_LVL_SHFTR_EN_5 FMSH_WriteReg(FPS_SLCR_BASEADDR, 0x004, 0xDF0D767BU); //lock /* * Initialize the SPI driver so that it's ready to use, * specify the device ID that is generated in xparameters.h. */ ConfigPtr = XSpi_LookupConfig(SPI_DEVICE_ID); if (ConfigPtr == NULL) { return XST_DEVICE_NOT_FOUND; } Status = XSpi_CfgInitialize(&Spi, ConfigPtr, ConfigPtr->BaseAddress); if (Status != XST_SUCCESS) { return XST_FAILURE; } /* * Connect the SPI driver to the interrupt subsystem such that * interrupts can occur. This function is application specific. */ Status = axi_irq_request(&IntcInstance); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Setup the handler for the SPI that will be called from the interrupt * context when an SPI status occurs, specify a pointer to the SPI * driver instance as the callback reference so the handler is able to * access the instance data. */ XSpi_SetStatusHandler(&Spi, &Spi, (XSpi_StatusHandler)SpiHandler); /* * Set the SPI device as a master and in manual slave select mode such * that the slave select signal does not toggle for every byte of a * transfer, this must be done before the slave select is set. */ Status = XSpi_SetOptions(&Spi, XSP_MASTER_OPTION | XSP_MANUAL_SSELECT_OPTION); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Select the quad flash device on the SPI bus, so that it can be * read and written using the SPI bus. */ Status = XSpi_SetSlaveSelect(&Spi, SPI_SELECT); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Start the SPI driver so that interrupts and the device are enabled. */ XSpi_Start(&Spi); /* * Specify address in the Quad Serial Flash for the Erase/Write/Read * operations. */ Address = FLASH_TEST_ADDRESS; SpiFlashWriteEnable(&Spi); Spi_4BYTE_Enable(&Spi); /******************************************************************************* * flash全地址读写(16Mflash全地址读写) *******************************************************************************/ for(i=0;i<512;i++){ SpiFlashWriteEnable(&Spi); SpiFlashSectorErase(&Spi, (0x00000000+65536*i)); flash_erase_cnt++; fmsh_print("The flash was erased into %d sectors\n\r",flash_erase_cnt); } fmsh_print("****flash_start_write****\n\r"); for(i=0;i<131072;i++){ SpiFlashWriteEnable(&Spi); SpiFlashWrite(&Spi, (0x00000000+i*256), 256, 0x02); } fmsh_print("****flash_write_finish,start reading flash****\n\r"); for(i=0;i<131072;i++){ SpiFlashRead(&Spi, (0x00000000+i*256), 256, COMMAND_RANDOM_READ); for(j=0;j<256;j++){ if(ReadBuffer[j + READ_WRITE_EXTRA_BYTES] == (u8)(j+0x20)){ read_ture_cnt++; } else{ read_flied_cnt++; fmsh_print("Address=%08x,ReadBuffer_flied=%x\n\r",(0x00000000+i*256),ReadBuffer[j]); } } for(Index = 0; Index < PAGE_SIZE + READ_WRITE_EXTRA_BYTES + DUAL_READ_DUMMY_BYTES; Index++) { ReadBuffer[Index] = 0x00; } } fmsh_print("read_ture_cnt=%d\n\r",read_ture_cnt); fmsh_print("read_flied_cnt=%d\n\r",read_flied_cnt); if(read_flied_cnt==0){ fmsh_print("****The full address flash was successful****\n\r"); } else{ fmsh_print("****The full address flash was failed****\n\r"); } return XST_SUCCESS; } /*****************************************************************************/ /** * * This function enables writes to the Numonyx Serial Flash memory. * * @param SpiPtr is a pointer to the instance of the Spi device. * * @return XST_SUCCESS if successful else XST_FAILURE. * * @note None * ******************************************************************************/ int SpiFlashWriteEnable(XSpi *SpiPtr) { int Status; /* * Wait while the Flash is busy. */ Status = SpiFlashWaitForFlashReady(); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Prepare the WriteBuffer. */ WriteBuffer[BYTE1] = COMMAND_WRITE_ENABLE; /* * Initiate the Transfer. */ TransferInProgress = TRUE; Status = XSpi_Transfer(SpiPtr, WriteBuffer, NULL, WRITE_ENABLE_BYTES); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Wait till the Transfer is complete and check if there are any errors * in the transaction.. */ while(TransferInProgress); if(ErrorCount != 0) { ErrorCount = 0; return XST_FAILURE; } return XST_SUCCESS; } int Spi_4BYTE_Enable(XSpi *SpiPtr) { int Status; /* * Wait while the Flash is busy. */ Status = SpiFlashWaitForFlashReady(); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Prepare the WriteBuffer. */ WriteBuffer[BYTE1] = COMMAND_4_BYTE_ENABLE; /* * Initiate the Transfer. */ TransferInProgress = TRUE; Status = XSpi_Transfer(SpiPtr, WriteBuffer, NULL, WRITE_ENABLE_BYTES); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Wait till the Transfer is complete and check if there are any errors * in the transaction.. */ while(TransferInProgress); if(ErrorCount != 0) { ErrorCount = 0; return XST_FAILURE; } return XST_SUCCESS; } /*****************************************************************************/ /** * * This function writes the data to the specified locations in the Numonyx Serial * Flash memory. * * @param SpiPtr is a pointer to the instance of the Spi device. * @param Addr is the address in the Buffer, where to write the data. * @param ByteCount is the number of bytes to be written. * * @return XST_SUCCESS if successful else XST_FAILURE. * * @note None * ******************************************************************************/ int SpiFlashWrite(XSpi *SpiPtr, u32 Addr, u32 ByteCount, u8 WriteCmd) { u32 Index; int Status; /* * Wait while the Flash is busy. */ Status = SpiFlashWaitForFlashReady(); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Prepare the WriteBuffer. */ WriteBuffer[BYTE1] = WriteCmd; WriteBuffer[BYTE2] = (u8) (Addr >> 24); WriteBuffer[BYTE3] = (u8) (Addr >> 16); WriteBuffer[BYTE4] = (u8) (Addr >> 8); WriteBuffer[BYTE5] = (u8) (Addr); /* * Fill in the TEST data that is to be written into the Numonyx Serial * Flash device. */ for(Index = 5; Index < ByteCount + READ_WRITE_EXTRA_BYTES; Index++) { WriteBuffer[Index] =(u8)((Index - 5) + TestByte); } /* * Initiate the Transfer. */ TransferInProgress = TRUE; Status = XSpi_Transfer(SpiPtr, WriteBuffer, NULL, (ByteCount + READ_WRITE_EXTRA_BYTES)); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Wait till the Transfer is complete and check if there are any errors * in the transaction. */ while(TransferInProgress); if(ErrorCount != 0) { ErrorCount = 0; return XST_FAILURE; } return XST_SUCCESS; } /*****************************************************************************/ /** * * This function reads the data from the Numonyx Serial Flash Memory * * @param SpiPtr is a pointer to the instance of the Spi device. * @param Addr is the starting address in the Flash Memory from which the * data is to be read. * @param ByteCount is the number of bytes to be read. * * @return XST_SUCCESS if successful else XST_FAILURE. * * @note None * ******************************************************************************/ int SpiFlashRead(XSpi *SpiPtr, u32 Addr, u32 ByteCount, u8 ReadCmd) { int Status; int k; /* * Wait while the Flash is busy. */ Status = SpiFlashWaitForFlashReady(); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Prepare the WriteBuffer. */ WriteBuffer[BYTE1] = ReadCmd; WriteBuffer[BYTE2] = (u8) (Addr >> 24); WriteBuffer[BYTE3] = (u8) (Addr >> 16); WriteBuffer[BYTE4] = (u8) (Addr >> 8); WriteBuffer[BYTE5] = (u8) (Addr); if (ReadCmd == COMMAND_DUAL_READ) { ByteCount += DUAL_READ_DUMMY_BYTES; } else if (ReadCmd == COMMAND_DUAL_IO_READ) { ByteCount += DUAL_READ_DUMMY_BYTES; } else if (ReadCmd == COMMAND_QUAD_IO_READ) { ByteCount += QUAD_IO_READ_DUMMY_BYTES; } else if (ReadCmd==COMMAND_QUAD_READ) { ByteCount += QUAD_READ_DUMMY_BYTES; } /* * Initiate the Transfer. */ TransferInProgress = TRUE; Status = XSpi_Transfer( SpiPtr, WriteBuffer, ReadBuffer, (ByteCount + READ_WRITE_EXTRA_BYTES)); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Wait till the Transfer is complete and check if there are any errors * in the transaction. */ while(TransferInProgress); if(ErrorCount != 0) { ErrorCount = 0; return XST_FAILURE; } return XST_SUCCESS; } /*****************************************************************************/ /** * * This function erases the entire contents of the Numonyx Serial Flash device. * * @param SpiPtr is a pointer to the instance of the Spi device. * * @return XST_SUCCESS if successful else XST_FAILURE. * * @note The erased bytes will read as 0xFF. * ******************************************************************************/ int SpiFlashBulkErase(XSpi *SpiPtr) { int Status; /* * Wait while the Flash is busy. */ Status = SpiFlashWaitForFlashReady(); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Prepare the WriteBuffer. */ WriteBuffer[BYTE1] = COMMAND_BULK_ERASE; /* * Initiate the Transfer. */ TransferInProgress = TRUE; Status = XSpi_Transfer(SpiPtr, WriteBuffer, NULL, BULK_ERASE_BYTES); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Wait till the Transfer is complete and check if there are any errors * in the transaction.. */ while(TransferInProgress); if(ErrorCount != 0) { ErrorCount = 0; return XST_FAILURE; } return XST_SUCCESS; } /*****************************************************************************/ /** * * This function erases the contents of the specified Sector in the Numonyx * Serial Flash device. * * @param SpiPtr is a pointer to the instance of the Spi device. * @param Addr is the address within a sector of the Buffer, which is to * be erased. * * @return XST_SUCCESS if successful else XST_FAILURE. * * @note The erased bytes will be read back as 0xFF. * ******************************************************************************/ int SpiFlashSectorErase(XSpi *SpiPtr, u32 Addr) { int Status; /* * Wait while the Flash is busy. */ Status = SpiFlashWaitForFlashReady(); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Prepare the WriteBuffer. */ WriteBuffer[BYTE1] = COMMAND_SECTOR_ERASE; WriteBuffer[BYTE2] = (u8) (Addr >> 24); WriteBuffer[BYTE3] = (u8) (Addr >> 16); WriteBuffer[BYTE4] = (u8) (Addr >> 8); WriteBuffer[BYTE5] = (u8) (Addr); /* * Initiate the Transfer. */ TransferInProgress = TRUE; Status = XSpi_Transfer(SpiPtr, WriteBuffer, NULL, 5); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Wait till the Transfer is complete and check if there are any errors * in the transaction.. */ while(TransferInProgress); if(ErrorCount != 0) { ErrorCount = 0; return XST_FAILURE; } return XST_SUCCESS; } /*****************************************************************************/ /** * * This function reads the Status register of the Numonyx Flash. * * @param SpiPtr is a pointer to the instance of the Spi device. * * @return XST_SUCCESS if successful else XST_FAILURE. * * @note The status register content is stored at the second byte * pointed by the ReadBuffer. * ******************************************************************************/ int SpiFlashGetStatus(XSpi *SpiPtr) { int Status; /* * Prepare the Write Buffer. */ WriteBuffer[BYTE1] = COMMAND_STATUSREG_READ; /* * Initiate the Transfer. */ TransferInProgress = TRUE; Status = XSpi_Transfer(SpiPtr, WriteBuffer, ReadBuffer, STATUS_READ_BYTES); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Wait till the Transfer is complete and check if there are any errors * in the transaction.. */ while(TransferInProgress); if(ErrorCount != 0) { ErrorCount = 0; return XST_FAILURE; } return XST_SUCCESS; } /*****************************************************************************/ /** * * This function waits till the Numonyx serial Flash is ready to accept next * command. * * @param None * * @return XST_SUCCESS if successful else XST_FAILURE. * * @note This function reads the status register of the Buffer and waits *. till the WIP bit of the status register becomes 0. * ******************************************************************************/ int SpiFlashWaitForFlashReady(void) { int Status; u8 StatusReg; while(1) { /* * Get the Status Register. The status register content is * stored at the second byte pointed by the ReadBuffer. */ Status = SpiFlashGetStatus(&Spi); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Check if the flash is ready to accept the next command. * If so break. */ StatusReg = ReadBuffer[1]; if((StatusReg & FLASH_SR_IS_READY_MASK) == 0) { break; } } return XST_SUCCESS; } /*****************************************************************************/ /** * * This function is the handler which performs processing for the SPI driver. * It is called from an interrupt context such that the amount of processing * performed should be minimized. It is called when a transfer of SPI data * completes or an error occurs. * * This handler provides an example of how to handle SPI interrupts and * is application specific. * * @param CallBackRef is the upper layer callback reference passed back * when the callback function is invoked. * @param StatusEvent is the event that just occurred. * @param ByteCount is the number of bytes transferred up until the event * occurred. * * @return None. * * @note None. * ******************************************************************************/ void SpiHandler(void *CallBackRef, u32 StatusEvent, unsigned int ByteCount) { /* * Indicate the transfer on the SPI bus is no longer in progress * regardless of the status event. */ TransferInProgress = FALSE; /* * If the event was not transfer done, then track it as an error. */ if (StatusEvent != XST_SPI_TRANSFER_DONE) { ErrorCount++; } } int SpiFlashQuadEnable(XSpi *SpiPtr) { int Status; /* * Perform the Write Enable operation. */ Status = SpiFlashWriteEnable(SpiPtr); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Wait while the Flash is busy. */ Status = SpiFlashWaitForFlashReady(); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Prepare the WriteBuffer. */ WriteBuffer[BYTE1] = 0x01; WriteBuffer[BYTE2] = 0x00; WriteBuffer[BYTE3] = 0x02; /* QE = 1 */ /* * Initiate the Transfer. */ TransferInProgress = TRUE; Status = XSpi_Transfer(SpiPtr, WriteBuffer, NULL, 3); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Wait till the Transfer is complete and check if there are any errors * in the transaction.. */ while(TransferInProgress); if(ErrorCount != 0) { ErrorCount = 0; return XST_FAILURE; } /* * Wait while the Flash is busy. */ Status = SpiFlashWaitForFlashReady(); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Verify that QE bit is set by reading status register 2. */ /* * Prepare the Write Buffer. */ WriteBuffer[BYTE1] = 0x35; /* * Initiate the Transfer. */ TransferInProgress = TRUE; Status = XSpi_Transfer(SpiPtr, WriteBuffer, ReadBuffer, STATUS_READ_BYTES); if(Status != XST_SUCCESS) { return XST_FAILURE; } /* * Wait till the Transfer is complete and check if there are any errors * in the transaction.. */ while(TransferInProgress); if(ErrorCount != 0) { ErrorCount = 0; return XST_FAILURE; } return XST_SUCCESS; } /*****************************************************************************/ /** * * This function setups the interrupt system such that interrupts can occur * for the Spi device. This function is application specific since the actual * system may or may not have an interrupt controller. The Spi device could be * directly connected to a processor without an interrupt controller. The * user should modify this function to fit the application. * * @param SpiPtr is a pointer to the instance of the Spi device. * * @return XST_SUCCESS if successful, otherwise XST_FAILURE. * * @note None * ******************************************************************************/ int axi_irq_request(void *InstancePtr) { u32 Status; Status = FGicPs_SetupInterruptSystem(InstancePtr);//初始化中断测试系统 if(Status!=GIC_SUCCESS) { return GIC_FAILURE ; } Status = FGicPs_Connect(InstancePtr, PL0_INT_ID, (FMSH_InterruptHandler)XSpi_InterruptHandler,&Spi); if(Status != GIC_SUCCESS) { return GIC_FAILURE; } //设置中断号,触发中断后对于中断函数的访问。 FGicPs_SetPriorityTriggerType(InstancePtr, PL0_INT_ID, 0x0, 0x1);//设置触发方式 FMSH_ExceptionRegisterHandler(FMSH_EXCEPTION_ID_IRQ_INT, (FMSH_ExceptionHandler)FGicPs_InterruptHandler_IRQ, InstancePtr); FMSH_ExceptionEnable(); FGicPs_Enable(InstancePtr, PL0_INT_ID); //注意中断号是57 return GIC_SUCCESS; }
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