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signature=bf4dd3e681d64c12951e9bd1efab070c,mame/pgm.cpp at 1f786226cb3b42da77bafef70105311b64166732 ...

作者：AllinToyou | 2024-03-30 21:53:44

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nmk_bgvideoram_w

// license:BSD-3-Clause

// copyright-holders:David Haywood, ElSemi

Based on Information from ElSemi

A flexible cartridge based platform some would say was designed to compete with

SNK's NeoGeo and Capcom's CPS Hardware systems, despite its age it only uses a

68000 for the main processor and a Z80 to drive the sound, just like the two

previously mentioned systems in that respect..

Resolution is 448x224, 15 bit colour

Sound system is ICS WaveFront 2115 Wavetable midi synthesizer, used in some

actual sound cards (Turtle Beach)

Later games are encrypted. Latest games (kov2, ddp2) include an arm7

coprocessor with an internal rom and an encrypted external rom.

Roms Contain the Following Data

Pxxxx - 68k Program

Txxxx - TX & BG Graphics (2 formats within the same rom)

Mxxxx - Music samples (8 bit mono 11025Hz)

Axxxx - Colour Data (for sprites)

Bxxxx - Masks & A Rom Colour Indexes (for sprites)

There is no rom for the Z80, the program is uploaded by the 68k

Known Games on this Platform

----------------------------

010x - 1997 - Oriental Legend

020x - 1997 - Dragon World 2

030x - 1998 - The Killing Blade

040x - 1998 - Dragon World 3

050x - 1999? - Oriental Legend Super

060x - 1999 - Knights of Valor, Knights of Valor Plus, Knights of Valor Super Heroes

070x - 1999 - Photo Y2k

080x - 1999 - Puzzle Star

090x - 2001 - Puzzli II

100x - 2001 - Martial Masters

120x - 2001 - Knights of Valor 2 Plus (9 Dragons?)

130x - 2001 - DoDonpachi II

0450x - 2002 - Demon Front (also known to be produced / sold in a single PCB version)

(add more)

TODO:

- IRQ4 generation - Puzzli 2 doesn't like this, many other games require it for coins / inputs to work.

- Verify/Implement unemulated vreg usage (b04000, b0e000)

b04000 is 210h or 610h, bit 10 unknown

b0e000 bit 2/0 related to VRAM access / DMA / or others?

- Zooming function is not fully verified; sprite zoom table is bit different in drgw2

Protection Devices / Co-processors

----------------------------------

IGS used a variety of additional ASIC chips on the game boards, these act as protection and

also give additional power to the board to make up for the limited power of the 68000

processor. Some protection devices use external data roms, others have internal code only.

Most of these are not emulated correctly. In most cases the protection device supplies the

game region code..

ASIC 3:

state based device?

see

machine/pgmprot_orlegend.cpp

ASIC 25 + ASIC 12

state based device + rom overlays

see

machine/pgmprot_igs025_igs012.cpp

ASIC 25 + ASIC 22

state based device + encrypted DMA device

see

machine/pgmprot_igs025_igs022.cpp

ASIC 25 + ASIC 28

state based device + encrypted DMA device?

see

machine/pgmprot_igs025_igs028.cpp

ASIC 027A(55857F/55857G):

ARM based CPUs with internal ROM

see

machine/pgmprot_igs027a_type1.cpp

machine/pgmprot_igs027a_type2.cpp

machine/pgmprot_igs027a_type3.cpp

there are probably more...

PCB Layout

----------

IGS PCB NO-0133-2 (Main Board)

|-------------------------------------------------------------------------------------|

| |----------------------------| |----------| |----------------------------| |

| PGM_T01S.U29 UM61256 SRM2B61256 SRM2B61256|

| |---------| 33.8688MHz |----------| SRM2B61256 SRM2B61256|

| |(PLCC84) | |(QFP256) | |

| | | | | |

| |---------| 50MHz |----------| |

| UPD6379 PGM_M01S.U18 |----------| |

|VOL |MC68HC000 | 74HC132 |

| |FN20 | 20MHz 74HC132 |

| UPC844C |------| |(PLCC68) | |

| |Z80 | | | V3021 |

| |PLCC44| PAL |----------| |

| |------| |--------| 32.768kHz |-|

| |IGS026 | |

| |(QFP144)| |--------| I|

| | | |IGS026 | D|

| |--------| |(QFP144)| C|

|TDA1519A UM61256 UM61256 | | 3|

| TD62064 |--------| 4|

| 3.6V_BATT |

| |-|

| |----| |-----| SW3 |

| | | J A M M A | | SW1 |

|--------------| |-------------------------------------------| |---------------|

IGS PCB NO-0136 (Riser)

|-------------------------------------------------------------------------------------|

| |---------------------------------| |---------------------------------| |

| |

| |---------------------------------| |---------------------------------| |

| |

| |----------------------------| |----------| |----------------------------| |

|---| |---| |---| |----|

|----------------------------| |----------| |----------------------------|

Notes:

All IC's are shown.

CPU's

-----

68HC000FN20 - Motorola 68000 processor, clocked at 20.000MHz (PLCC68)

Z80 - Zilog Z0840008VSC Z80 processor, clocked at 8.468MHz (PLCC44)

SOUND

-----

ICS2115 - ICS WaveFront ICS2115V Wavetable Midi Synthesizer, clocked at 33.8688MHz (PLCC84)

RAM

---

SRM2B256 - Epson SRM2B256SLMX55 8K x8 SRAM (x4, SOP28)

UM6164 - Unicorn Microelectronics UM6164DS-12 8K x8 SRAM (x2, SOJ28)

UM61256 - Unicorn Microelectronics UM61256FS-15 32K x8 SRAM (x3, SOJ28)

ROMs

----

PGM_M01S.U18 - 16MBit mask ROM (TSOP48)

PGM_P01S.U20 - 1MBit mask ROM (DIP40, socketed, equivalent to 27C1024 EPROM)

PGM_T01S.U29 - 16MBit mask ROM (SOP44)

CUSTOM IC's

-----------

IGS023 (QFP256)

IGS026 (x2, QFP144)

OTHER

-----

3.6V_BATT - 3.6V NICad battery, connected to the V3021 RTC

IDC34 - IDC34 way flat cable plug, PGM can support 4 players max in two cabs,

this is jamma connector for another cab and the P3&P4

PAL - Atmel ATF16V8B PAL (DIP20)

SW1 - Push button switch to enter Test Mode

SW2 - 8 position DIP Switch (for configuration of PCB/game options)

SW3 - SPDT switch , to clear the NVRAM and reset the whole system

TD62064 - Toshiba NPN 50V 1.5A Quad Darlington Switch; for driving coin meters (DIP16)

TDA1519A - Philips 2x 6W Stereo Power AMP (SIL9)

uPD6379 - NEC 2-channel 16-bit D/A converter 10mW typ. (SOIC8)

uPC844C - NEC Quad High Speed Wide Band Operational Amplifier (DIP14)

V3021 - EM Microelectronic-Marin SA Ultra Low Power 32kHz CMOS Real Time Clock (DIP8)

VOL - Volume potentiometer

#include "emu.h"

#include "includes/pgm.h"

#include "machine/pgmprot_igs025_igs012.h"

#include "machine/pgmprot_igs025_igs022.h"

#include "machine/pgmprot_igs025_igs028.h"

#include "machine/pgmprot_igs027a_type1.h"

#include "machine/pgmprot_igs027a_type2.h"

#include "machine/pgmprot_igs027a_type3.h"

#include "machine/pgmprot_orlegend.h"

#include "screen.h"

#include "speaker.h"

#define PGMLOGERROR 0

u16 pgm_state::videoram_r(offs_t offset)

{

if (offset < 0x4000 / 2)

return m_bg_videoram[offset & 0x7ff];

else if (offset < 0x7000 / 2)

return m_tx_videoram[offset & 0xfff];

else

return m_videoram[offset];

}

void pgm_state::videoram_w(offs_t offset, u16 data, u16 mem_mask)

{

if (offset < 0x4000 / 2)

bg_videoram_w(offset & 0x7ff, data, mem_mask);

else if (offset < 0x7000 / 2)

tx_videoram_w(offset & 0xfff, data, mem_mask);

else

COMBINE_DATA(&m_videoram[offset]);

}

void pgm_state::coin_counter_w(u16 data)

{

machine().bookkeeping().coin_counter_w(0, data & 0x0001);

machine().bookkeeping().coin_counter_w(1, data & 0x0002);

machine().bookkeeping().coin_counter_w(2, data & 0x0004);

machine().bookkeeping().coin_counter_w(3, data & 0x0008);

}

u8 pgm_state::z80_ram_r(offs_t offset)

{

return m_z80_mainram[offset];

}

void pgm_state::z80_ram_w(offs_t offset, u8 data)

{

const int pc = m_maincpu->pc();

m_z80_mainram[offset] = data;

if (pc != 0xf12 && pc != 0xde2 && pc != 0x100c50 && pc != 0x100b20)

if (PGMLOGERROR)

logerror("Z80: write %04x, %02x (%06x)\n", offset, data, m_maincpu->pc());

}

void pgm_state::z80_reset_w(offs_t offset, u16 data, u16 mem_mask)

{

if (PGMLOGERROR)

logerror("Z80: reset %04x @ %04x (%06x)\n", data, mem_mask, m_maincpu->pc());

if (data == 0x5050)

{

m_ics->reset();

m_soundcpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);

m_soundcpu->pulse_input_line(INPUT_LINE_RESET, attotime::zero);

}

else

{

/* this might not be 100% correct, but several of the games (ddp2, puzzli2 etc.) expect the z80 to be turned

off during data uploads, they write here before the upload */

m_soundcpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);

}

void pgm_state::z80_ctrl_w(offs_t offset, u16 data, u16 mem_mask)

{

if (PGMLOGERROR)

logerror("Z80: ctrl %04x @ %04x (%06x)\n", data, mem_mask, m_maincpu->pc());

}

void pgm_state::m68k_l1_w(u8 data)

{

if (PGMLOGERROR)

logerror("SL 1 m68.w %02x (%06x) IRQ\n", data, m_maincpu->pc());

m_soundlatch->write(data);

m_soundcpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero);

}

void pgm_state::z80_l3_w(u8 data)

{

if (PGMLOGERROR)

logerror("SL 3 z80.w %02x (%04x)\n", data, m_soundcpu->pc());

m_soundlatch3->write(data);

}

/*** Memory Maps *************************************************************/

/*** Z80 (sound CPU)**********************************************************/

void pgm_state::pgm_z80_mem(address_map &map)

{

map(0x0000, 0xffff).ram().share("z80_mainram");

}

void pgm_state::pgm_z80_io(address_map &map)

{

map(0x8000, 0x8003).rw("ics", FUNC(ics2115_device::read), FUNC(ics2115_device::write));

map(0x8100, 0x81ff).r(m_soundlatch3, FUNC(generic_latch_8_device::read)).w(FUNC(pgm_state::z80_l3_w));

map(0x8200, 0x82ff).rw(m_soundlatch, FUNC(generic_latch_8_device::read), FUNC(generic_latch_8_device::write));

map(0x8400, 0x84ff).rw("soundlatch2", FUNC(generic_latch_8_device::read), FUNC(generic_latch_8_device::write));

}

/*** 68000 (main CPU) + variants for protection devices **********************/

void pgm_state::pgm_base_mem(address_map &map)

{

map(0x700006, 0x700007).nopw(); // Watchdog?

map(0x800000, 0x81ffff).ram().mirror(0x0e0000).share("sram"); /* Main Ram */

map(0x900000, 0x907fff).mirror(0x0f8000).rw(FUNC(pgm_state::videoram_r), FUNC(pgm_state::videoram_w)).share("videoram"); /* IGS023 VIDEO CHIP */

map(0xa00000, 0xa011ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette");

map(0xb00000, 0xb0ffff).ram().share("videoregs"); /* Video Regs inc. Zoom Table */

//map(0xb01000, 0xb0103f) Zoom/Shrink table for sprites

//map(0xb02000, 0xb02001) Background scroll Y

//map(0xb03000, 0xb03001) Background scroll X

//map(0xb04000, 0xb04001) Unknown #0

//map(0xb05000, 0xb05001) Foreground scroll Y

//map(0xb06000, 0xb06001) Foreground scroll X?

//map(0xb0e000, 0xb0e001) Unknown #1

map(0xc00003, 0xc00003).r(m_soundlatch, FUNC(generic_latch_8_device::read)).w(FUNC(pgm_state::m68k_l1_w));

map(0xc00005, 0xc00005).rw("soundlatch2", FUNC(generic_latch_8_device::read), FUNC(generic_latch_8_device::write));

map(0xc00007, 0xc00007).rw("rtc", FUNC(v3021_device::read), FUNC(v3021_device::write));

map(0xc00008, 0xc00009).w(FUNC(pgm_state::z80_reset_w));

map(0xc0000a, 0xc0000b).w(FUNC(pgm_state::z80_ctrl_w));

map(0xc0000d, 0xc0000d).rw(m_soundlatch3, FUNC(generic_latch_8_device::read), FUNC(generic_latch_8_device::write));

map(0xc08000, 0xc08001).portr("P1P2");

map(0xc08002, 0xc08003).portr("P3P4");

map(0xc08004, 0xc08005).portr("Service");

map(0xc08006, 0xc08007).portr("DSW").w(FUNC(pgm_state::coin_counter_w));

map(0xc10000, 0xc1ffff).rw(FUNC(pgm_state::z80_ram_r), FUNC(pgm_state::z80_ram_w)); /* Z80 Program */

}

void pgm_state::pgm_mem(address_map &map)

{

pgm_base_mem(map);

map(0x000000, 0x0fffff).rom(); /* BIOS ROM */

}

void pgm_state::pgm_basic_mem(address_map &map)

{

pgm_mem(map);

map(0x100000, 0x3fffff).bankr("bank1"); /* Game ROM */

}

/*** Input Ports *************************************************************/

/* enough for 4 players, the basic dips mapped are listed in the test mode */

INPUT_PORTS_START( pgm )

PORT_START("P1P2")

PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START1 )

PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)

PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)

PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)

PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)

PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)

PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)

PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)

PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_START2 )

PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)

PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)

PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)

PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)

PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)

PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)

PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)

PORT_START("P3P4")

PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START3 )

PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(3)

PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(3)

PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(3)

PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(3)

PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3)

PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(3)

PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(3)

PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_START4 )

PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(4)

PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(4)

PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(4)

PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(4)

PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(4)

PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(4)

PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(4)

PORT_START("Service")

PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )

PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )

PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN3 )

PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN4 )

PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SERVICE3 ) PORT_NAME("Test-Key 1P+2P")

PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Service 1P+2P")

PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_SERVICE4 ) PORT_NAME("Test-Key 3P+4P")

PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Service 3P+4P")

PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(1)

PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2)

PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(3)

PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(4)

PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN ) // unused?

PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN ) // unused?

PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN ) // unused?

PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN ) // unused?

PORT_START("DSW")

PORT_SERVICE( 0x0001, IP_ACTIVE_LOW )

PORT_DIPNAME( 0x0002, 0x0002, "Music" )

PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )

PORT_DIPSETTING( 0x0002, DEF_STR( On ) )

PORT_DIPNAME( 0x0004, 0x0004, "Voice" )

PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )

PORT_DIPSETTING( 0x0004, DEF_STR( On ) )

PORT_DIPNAME( 0x0008, 0x0008, "Free" )

PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )

PORT_DIPSETTING( 0x0000, DEF_STR( On ) )

PORT_DIPNAME( 0x0010, 0x0010, "Stop" )

PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )

PORT_DIPSETTING( 0x0000, DEF_STR( On ) )

PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unused ) )

PORT_DIPSETTING( 0x0020, DEF_STR( Off ) )

PORT_DIPSETTING( 0x0000, DEF_STR( On ) )

PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unused ) )

PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )

PORT_DIPSETTING( 0x0000, DEF_STR( On ) )

PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unused ) )

PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )

PORT_DIPSETTING( 0x0000, DEF_STR( On ) )

PORT_START("Region")

PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )

INPUT_PORTS_END

/*** GFX Decodes *************************************************************/

/* We can't decode the sprite data like this because it isn't tile based.

Note that the bit indexes are reversed compared to usual gfx layouts

(0-7 = LSB to MSB) */

static const gfx_layout pgm32_charlayout =

{

32,32,

RGN_FRAC(1,1),

{ 4, 3, 2, 1, 0 },

{ STEP32(0,5) },

{ STEP32(0,5*32) },

32*32*5

};

GFXDECODE_START( gfx_pgm )

GFXDECODE_ENTRY( "tiles", 0, gfx_8x8x4_packed_lsb, 0x800, 32 ) /* 8x8x4 Tiles */

GFXDECODE_REVERSEBITS( "tiles", 0, pgm32_charlayout, 0x400, 32 ) /* 32x32x5 Tiles */

GFXDECODE_END

/*** Machine Driver **********************************************************/

/* most games require IRQ4 for inputs to work, Puzzli 2 is explicit about not wanting it tho

what is the source? */

TIMER_DEVICE_CALLBACK_MEMBER(pgm_state::interrupt)

{

int scanline = param;

// already being generated by screen.screen_vblank().set(FUNC(pgm_state::screen_vblank));;

// if (scanline == 224)

// m_maincpu->set_input_line(6, HOLD_LINE);

// vblank end interrupt

if (scanline == 0)

if (!m_irq4_disabled) m_maincpu->set_input_line(4, HOLD_LINE);

}

void pgm_state::machine_reset()

{

m_soundcpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);

}

void pgm_state::pgmbase(machine_config &config)

{

/* basic machine hardware */

M68000(config, m_maincpu, 20_MHz_XTAL); /* 20 mhz! verified on real board */

m_maincpu->set_addrmap(AS_PROGRAM, &pgm_state::pgm_basic_mem);

TIMER(config, "scantimer").configure_scanline(FUNC(pgm_state::interrupt), "screen", 0, 1);

Z80(config, m_soundcpu, 33.8688_MHz_XTAL/4);

m_soundcpu->set_addrmap(AS_PROGRAM, &pgm_state::pgm_z80_mem);

m_soundcpu->set_addrmap(AS_IO, &pgm_state::pgm_z80_io);

NVRAM(config, "sram", nvram_device::DEFAULT_ALL_0);

V3021(config, "rtc");

/* video hardware */

screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));

screen.set_raw(50_MHz_XTAL/5, 640, 0, 448, 264, 0, 224); // or 20MHz / 2? framerate verified

screen.set_screen_update(FUNC(pgm_state::screen_update));

screen.screen_vblank().set(FUNC(pgm_state::screen_vblank));

screen.set_palette(m_palette);

GFXDECODE(config, m_gfxdecode, m_palette, gfx_pgm);

PALETTE(config, m_palette, palette_device::BLACK).set_format(palette_device::xRGB_555, 0x1200/2);

/*sound hardware */

SPEAKER(config, "mono").front_center();

GENERIC_LATCH_8(config, m_soundlatch);

GENERIC_LATCH_8(config, "soundlatch2");

GENERIC_LATCH_8(config, m_soundlatch3);

ICS2115(config, m_ics, 33.8688_MHz_XTAL);

m_ics->irq().set_inputline("soundcpu", 0);

m_ics->add_route(ALL_OUTPUTS, "mono", 5.0);

}

void pgm_state::pgm(machine_config &config)

{

pgmbase(config);

}

/*** Rom Loading *************************************************************/

/* take note of "sprmask" needed for expanding the Sprite Colour Data */

#define ROM_LOAD16_WORD_SWAP_BIOS(bios,name,offset,length,hash) \

ROMX_LOAD(name, offset, length, hash, ROM_GROUPWORD | ROM_REVERSE | ROM_BIOS(bios))

#define PGM_68K_BIOS \

ROM_SYSTEM_BIOS( 0, "v2", "PGM Bios V2" ) \

ROM_LOAD16_WORD_SWAP_BIOS( 0, "pgm_p02s.u20", 0x00000, 0x020000, CRC(78c15fa2) SHA1(885a6558e022602cc6f482ac9667ba9f61e75092) ) /* Version 2 (Label: IGS | PGM P02S | 1P0792D1 | J992438 )*/ \

ROM_SYSTEM_BIOS( 1, "v1", "PGM Bios V1" ) \

ROM_LOAD16_WORD_SWAP_BIOS( 1, "pgm_p01s.u20", 0x00000, 0x020000, CRC(e42b166e) SHA1(2a9df9ec746b14b74fae48b1a438da14973702ea) ) /* Version 1 */

#define PGM_AUDIO_BIOS \

ROM_LOAD( "pgm_m01s.rom", 0x000000, 0x200000, CRC(45ae7159) SHA1(d3ed3ff3464557fd0df6b069b2e431528b0ebfa8) )

#define PGM_VIDEO_BIOS \

ROM_LOAD( "pgm_t01s.rom", 0x000000, 0x200000, CRC(1a7123a0) SHA1(cc567f577bfbf45427b54d6695b11b74f2578af3) )

/* The Bios - NOT A GAME */

ROM_START( pgm )

ROM_REGION( 0x600000, "maincpu", 0 ) /* 68000 Code */

PGM_68K_BIOS

ROM_REGION( 0x280000, "tiles", 0 ) /* 8x8 Text Layer Tiles */

PGM_VIDEO_BIOS

ROM_REGION( 0x200000, "ics", 0 ) /* Samples - (8 bit mono 11025Hz) - */

PGM_AUDIO_BIOS

ROM_REGION16_LE( 0x1000000, "sprcol", ROMREGION_ERASEFF ) /* Sprite Colour Data */

ROM_REGION16_LE( 0x1000000, "sprmask", ROMREGION_ERASEFF ) /* Sprite Masks + Colour Indexes */

ROM_END

ROM_START( orlegend )

ROM_REGION( 0x600000, "maincpu", 0 ) /* 68000 Code */

PGM_68K_BIOS

ROM_LOAD16_WORD_SWAP( "p0103.rom", 0x100000, 0x200000, CRC(d5e93543) SHA1(f081edc26514ca8354c13c7f6f89aba8e4d3e7d2) )

ROM_REGION( 0xa00000, "tiles", 0 ) /* 8x8 Text Tiles + 32x32 BG Tiles */

PGM_VIDEO_BIOS

ROM_LOAD( "pgm_t0100.u8", 0x180000, 0x400000, CRC(61425e1e) SHA1(20753b86fc12003cfd763d903f034dbba8010b32) )

ROM_REGION16_LE( 0x2000000, "sprcol", 0 ) /* Sprite Colour Data */

ROM_LOAD( "pgm_a0100.u5", 0x0000000, 0x400000, CRC(8b3bd88a) SHA1(42db3a60c6ba9d83ebe2008c8047d094027f65a7) )

ROM_LOAD( "pgm_a0101.u6", 0x0400000, 0x400000, CRC(3b9e9644) SHA1(5b95ec1d25c3bc3504c93547f5adb5ce24376405) )

ROM_LOAD( "pgm_a0102.u7", 0x0800000, 0x400000, CRC(069e2c38) SHA1(9bddca8c2f5bd80f4abe4e1f062751736dc151dd) )

ROM_LOAD( "pgm_a0103.u8", 0x0c00000, 0x400000, CRC(4460a3fd) SHA1(cbebdb65c17605853f7d0b298018dd8801a25a58) )

ROM_LOAD( "pgm_a0104.u11", 0x1000000, 0x400000, CRC(5f8abb56) SHA1(6c1ddc0309862a141aa0c0f63b641aec9257aaee) )

ROM_LOAD( "pgm_a0105.u12", 0x1400000, 0x400000, CRC(a17a7147) SHA1(44eeb43c6b0ebb829559a20ae357383fbdeecd82) )

ROM_REGION16_LE( 0x1000000, "sprmask", 0 ) /* Sprite Masks + Colour Indexes */

ROM_LOAD( "pgm_b0100.u9", 0x0000000, 0x400000, CRC(69d2e48c) SHA1(5b5f759007264c07b3b39be8e03a713698e1fc2a) )

ROM_LOAD( "pgm_b0101.u10", 0x0400000, 0x400000, CRC(0d587bf3) SHA1(5347828b0a6e4ddd7a263663d2c2604407e4d49c) )

ROM_LOAD( "pgm_b0102.u15", 0x0800000, 0x400000, CRC(43823c1e) SHA1(e10a1a9a81b51b11044934ff702e35d8d7ab1b08) )

ROM_REGION( 0x600000, "ics", 0 ) /* Samples - (8 bit mono 11025Hz) - */

PGM_AUDIO_BIOS

ROM_LOAD( "pgm_m0100.u1", 0x400000, 0x200000, CRC(e5c36c83) SHA1(50c6f66770e8faa3df349f7d68c407a7ad021716) )

ROM_END

ROM_START( orlegende )

ROM_REGION( 0x600000, "maincpu", 0 ) /* 68000 Code */

PGM_68K_BIOS

ROM_LOAD16_WORD_SWAP( "pgm_p0102.u2", 0x100000, 0x200000, CRC(4d0f6cc5) SHA1(8d41f0a712fb11a1da865f5159e5e27447b4388a) )