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AXI QSPI(Quad Serial Peripheral Interface) IP 提供串行接口连接SPI从设备,支持Standard(单线)、Dual(双线)、Quad(四线)。
特点:
- 支持AXI4、 AXI4-Lite(便于后向兼容v1.00)接口;
- 突发传输模式(burst mode)
- Standard(单线)、Dual(双线)、Quad(四线)模式,线越多传输越快
- 可编程时钟相位和极性
- FIFO位深可配:16或256
从设备可选: Mixed, Micron, Winbond, Macronix, Spansion (Beta Version)
突发传输:也称为数据突发,在通信领域一般指在短时间内进行相对高带宽的数据传输。相邻的存储单元连续进行数据传输的方式,连续传输的周期数就是突发长度(Burst Lengths)。在突发传输模式下,多个数据单元当做一个单元(相当一个数据块)来传送,从而提高了传输效率。在FIFO中,先向FIFO中写入数据,再给定长度,数据将打包发送到接收方。
配置为Dual模式,从设备设为Mixed。这些命令在 Winbond、Micron、Spansion的Flash设备中相同。
配置为Quad模式,从设备设为Mixed。这些命令在 Winbond、Micron、Spansion的Flash设备中相同。
下述为Winbond、Micron、Spansion、Macronix命令对比情况,更详细说明可参考器件手册。
STARTUPE2 primitive is applicable for 7 series devices. The STARTUPE3 primitive is applicable for UltraScale devices.
- In standard mode the ext_spi_clk can be the same as the axi_aclk or axi4_aclk, but it should not be less than the AXI CLK or AXI4 ACLK. This mode is specifically for slow operating devices that work on the SPI protocol. Examples of these devices are EEPROMs and SPI interface-based DACs.
- In XIP Mode or Dual/Quad variants of Legacy/Enhanced mode, set ext_spi_clk to double the intended SPI clock. The Frequency Ratio parameter divides this clock by 2 to generate the SPI clock. Most of the SPI flash memory commands operate at a higher SPI clock rate with the exception of some commands which operate at a lesser frequency. It is your responsibility to configure the core with the correct ext_spi_clk and Frequency Ratio parameter and use the appropriate commands. If slower operating commands are executed on higher SPI clock ratios, the core does not generate an error and passes these commands to the external flash memory, but at the same time, the operation of the flash memory is not guaranteed.
- In XIP mode, No. of Slaves is always equal to 1 and this parameter cannot be updated.
- The STARTUPE2 primitive is applicable for 7 series devices. The STARTUPE3 primitive is applicable for UltraScale and later devices.
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