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版本:2019.1
开发板:ZCU102
资源:Zynq UltraScale+ MPSoC DPU TRD 2019.1
% vivado -source scripts/trd_prj.tcl
After executing the script, the Vivado IPI block design comes up as shown in the below figure.
Click on “Generate Bitstream”.
Go to File > Export > Export Hardware
The HDF is created at $TRD_HOME/pl/prj/zcu102.sdk/top_wrapper.hdf
win10通过命令行打开某软件
其他操作同上
工具:petalinux 2019.1(安装见文档[ug1144]: PetaLinux Tools Documentation)
cd ~
petalinux-create -t project -s /opt/pkg/petalinux/2019.1/bsp/xilinx-dpu-trd-zcu102-v2019.1.bsp
petalinux-config --get-hw-description=<path-to-hdf/dsa-directory>
我们使用的是zcu102开开发板的bsp对于开发板是适用的,直接退出。
petalinux-build
Create a boot image (BOOT.BIN) including FSBL, ATF, bitstream, and u-boot.
petalinux-package --boot --format BIN --fsbl images/linux/zynqmp_fsbl.elf --u-boot images/linux/u-boot.elf --pmufw images/linux/pmufw.elf --fpga images/linux/*.bit --force
进入 /media/card/resnet50目录,运行./resnet50
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