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名称:基于FPGA的BCD计数译码显示电路设计VHDL代码Quartus仿真(文末获取)
软件:Quartus
语言:VHDL
代码功能:
利用VHDL语言,实现0~9901任意进制8421BCD计数译码显示电路,并将计数器输出的8421BCD进行共阳数码管显示,要求
1、计数器具有同步置数功能、异步清零功能,用VHDL实现计数逻辑,并阐述设计原理,给出关键 block diagram设计框图。
2、8421BCD码7段译码部分可以参见74LS48功能,用ⅥHDL实现译码逻辑,并阐述设计原理,给出关键 blockdiagram设计框图。
3、译码输出后驱动的数码管为共阳极数码管,阐述电路原理,给出相应编码方式。
4、报告要求:
(1)按要求的格式书写,所有内容一律打印、封面要求统一
(2)报告内容包括设计过程、软件仿真的结果及分析
(3)报告中要有整体电路原理图、各模块原理图;
(4)软件仿真包括各个模块的仿真和整体电路的仿真
1. 工程文件
a
2. 程序文件
3. 程序编译
4. RTL图
5. 仿真图
整体仿真图
BCD计数器模块仿真图
数码管译码模块仿真图
部分代码展示:
LIBRARY ieee; USE ieee.std_logic_1164.all; USE ieee.std_logic_unsigned.all; --BCD计数器 ENTITY cnt IS PORT ( CLK : IN STD_LOGIC;--时钟 CLR : IN STD_LOGIC;--异步清零 LD : IN STD_LOGIC;--同步置数 LD_BCD : IN STD_LOGIC_VECTOR(15 DOWNTO 0);--置数值BCD码 tho_BCD : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);--千位BCD输出 hun_BCD : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);--百位BCD输出 ten_BCD : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);--十位BCD输出 one_BCD : OUT STD_LOGIC_VECTOR(3 DOWNTO 0) --个位BCD输出 ); END cnt; ARCHITECTURE behave OF cnt IS SIGNAL cnt_number : STD_LOGIC_VECTOR(15 DOWNTO 0);--常数,控制进制是多少 SIGNAL tho_BCD_buf : STD_LOGIC_VECTOR(3 DOWNTO 0);--千位BCD输出 SIGNAL hun_BCD_buf : STD_LOGIC_VECTOR(3 DOWNTO 0);--百位BCD输出 SIGNAL ten_BCD_buf : STD_LOGIC_VECTOR(3 DOWNTO 0);--十位BCD输出 SIGNAL one_BCD_buf : STD_LOGIC_VECTOR(3 DOWNTO 0); --个位BCD输出 BEGIN cnt_number<=X"1234";--设置进制为1234 PROCESS (CLK, CLR) BEGIN IF (CLR = '1') THEN--异步清零 tho_BCD_buf <= "0000"; hun_BCD_buf <= "0000"; ten_BCD_buf <= "0000"; one_BCD_buf <= "0000"; ELSIF (CLK'EVENT AND CLK = '1') THEN IF (LD = '1') THEN--同步置数 tho_BCD_buf <= LD_BCD(15 downto 12); hun_BCD_buf <= LD_BCD(11 downto 8); ten_BCD_buf <= LD_BCD(7 downto 4); one_BCD_buf <= LD_BCD(3 downto 0); ELSIF ((tho_BCD_buf & hun_BCD_buf & ten_BCD_buf & one_BCD_buf) >= cnt_number) THEN--判断是否计数到最大值 tho_BCD_buf <= "0000"; hun_BCD_buf <= "0000"; ten_BCD_buf <= "0000"; one_BCD_buf <= "0000"; ELSIF (tho_BCD_buf = "1001" AND hun_BCD_buf = "1001" AND ten_BCD_buf = "0000" AND one_BCD_buf = "0001") THEN--计数到9901 tho_BCD_buf <= "0000"; hun_BCD_buf <= "0000"; ten_BCD_buf <= "0000"; one_BCD_buf <= "0000"; ELSIF (hun_BCD_buf = "1001" AND ten_BCD_buf = "1001" AND one_BCD_buf = "1001") THEN--计数到999 tho_BCD_buf <= tho_BCD_buf + "0001";--千位加1 hun_BCD_buf <= "0000"; ten_BCD_buf <= "0000"; one_BCD_buf <= "0000"; ELSIF (ten_BCD_buf = "1001" AND one_BCD_buf = "1001") THEN--计数到99 tho_BCD_buf <= tho_BCD_buf; hun_BCD_buf <= hun_BCD_buf + "0001";--百位加1 ten_BCD_buf <= "0000"; one_BCD_buf <= "0000"; ELSIF (one_BCD_buf = "1001") THEN--计数到9 tho_BCD_buf <= tho_BCD_buf; hun_BCD_buf <= hun_BCD_buf; ten_BCD_buf <= ten_BCD_buf + "0001";--十位加1 one_BCD_buf <= "0000"; ELSE tho_BCD_buf <= tho_BCD_buf; hun_BCD_buf <= hun_BCD_buf; ten_BCD_buf <= ten_BCD_buf; one_BCD_buf <= one_BCD_buf + "0001";--个位加1 END IF; END IF; END PROCESS; tho_BCD<=tho_BCD_buf;--千位BCD输出 hun_BCD<=hun_BCD_buf;--百位BCD输出 ten_BCD<=ten_BCD_buf;--十位BCD输出 one_BCD<=one_BCD_buf;--个位BCD输出 END behave;
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